ASIC Design

**Category** Engineering**Hire Type** Employee**Job ID** 12383**Remote Eligible** No**Date Posted** 27/07/2025***: Sr. Engineer - ASIC Digital Design (Physical Im - plementation/D esign/STA, 2+ years of exp) We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence,...

39251BR - INDIA - Noida **Job Description and Requirements** - We are seeking a Digital Verification Engineer who will be accounted for functional verification of High Speed interface IPs. A dynamic personality with eager to learn, drive Pre-silicon verification activities, Very good digital design & HDL implementation. Job responsibilities include: -...

40140BR - INDIA - Noida **Job Description and Requirements** - We are seeking a Digital Verification Engineer who will be accounted for functional verification of High Speed interface IPs. A dynamic personality with eager to learn, drive Pre-silicon verification activities, Very good digital design & HDL implementation. Job responsibilities include: -...

• Strong background in logic verification with a good understanding of logic design concepts • Expertise in Verilog System Verilog AVM OVM Perl scripting, and VCS simulator • Familiarity with the ASIC design flow and working knowledge of 3D Graphics. • Working knowledge of UNIX and Windows

10–20 yrs exp in ASIC/SoC Physical Design. Must have hands-on PnR, STA, CTS, floorplanning, tapeout exp. Strong tool skills & team leadership a must. Location: Bangalore (priority)/Chennai/Hyderabad/Noida. Required Candidate profilePD engineer with 10+ yrs in ASIC/SoC design. Skilled in floorplanning, PnR, STA, CTS, tapeouts. Strong in timing closure,...

Strong background of ASIC Physical Design: Floor planning, P&R, Extraction, IR Drop Analysis, Static Timing and Signal Integrity.Hands-on experience on technology nodes like 7nm, 14nm, 10nm.Good knowledge of EDA tools from Synopsys , Cadence and MentorHands-on experience in floor planning, placement optimizations, CTS and routing.Hands-on experience in...

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence Design Systems is looking for a highly motivated engineer to be part of the Modus R&D team, with a focus on validating and supporting Design-for-test (DFT) technologies. Candidate must have 2+ years of experience in DFT/ATPG/ASIC Design flows...

Position:Senior Engineer (Level 1)Job Description:- Functional Area: RTL design, Lower Power Synthesis, Low Power Design, UPF Flow - 5-20 years of experience in RTL design in Verilog, VHDL  - ASIC/FPGA experience  - If ASIC experience, then Lint/CDC tool experience  - If FPGA experience, then Xilinx or Altera/Intel FPGA parts and tools  - RTL...

Company:Qualcomm India Private LimitedJob Area:Engineering Group, Engineering Group > Hardware EngineeringGeneral Summary:As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware...

Company Description:Tecquire Solutions Private Limited is a comprehensive provider of semiconductor design services.The company was founded by a team with over 25+ years of experience in the semiconductor industry.Tecquire Solutions provides tailored services in the areas of DFT architecture, DFT implementation, silicon debug, pattern reduction, and Netlist...