FE CAD Engineer

3 weeks ago


india ACL Digital Full time

The role requires a senior person with 10+ years of experience in Verilog Simulation, Automation, Regression, Testing and coding.


Detailed JD is here:

Responsiblities:

Work closely with Design teams to ensure digital and mixed signal simulation tools and flows are robust and reliable.

Provide front line support for internal staff in the use of these tools

Define and maintain quality testing and benchmark methodology

Provide guidance on tool road map and strategic planning advice to management

Provide an interface with external tool vendors and suppliers

Mentor new users and other staff as needed

Document and otherwise archive developed material for future use and re-use

Such other comparable duties as may be required by management

Requirements/Qualifications:

Must possess a minimum of Bachelor’s Degree in Electronic Engineering, Computer Engineering or related program

Must possess a minimum of 10 years work experience in a digital CAD or design role

Must be familiar with EDA tools used for digital design and verification

o Must have experience with:

§ Questa, Xcelium or VCS

§ Verdi, Visualizer, or SimVision

§ UVM, System Verilog

§ UPF

Experience with verification regression management is an asset

Experience with emulation, software co-simulation, system simulation, mixed-signal simulation or prototyping is an asset

Experience with load management tools is an asset (e.g. LSF, RTDA, SunGrid)

Experience with data management tools is an asset (e.g. GIT, SVN, CVS)

Experience in scripting using Tcl, Python, csh/sh/bash, PERL, or other language is an asset

Must be familiar with linux OS

Excellent organizational skills and strong attention to detail

Ability and willingness to learn new skills and self-starter who can produce in a remote managed setting

Excellent written and verbal communication skills in English



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