Technical Lead
1 month ago
InnoPhase and Synergic Emergence have a co-employment relationship. For over three years, InnoPhase has partnered with Synergic Emergence, a professional employment organization provider, to offer our employees the best benefits and services. This arrangement means that Synergic Emergence provides employee pay checks and benefits, and InnoPhase will provide employment, evaluation, and advancement. By outsourcing some HR functions, InnoPhase can focus on what we do best – developing and implementing highly innovative SOC cellular radio integrated circuit products.
Key Responsibilities:
Individual contributor to develop Embedded Linux-based SW solutions for O-RAN Cellular base station radios.
Design and implement Front Haul Gateway on FPGA and Network Processor-based SoCs.
Assist with the definition, development & verification of FW/SW products.
Establish unit level design, implementation & test strategies.
Support integration & test and debug software for timely closure
Work with the Applications team and customers to provide the necessary support.
Job Requirements:
10+ years relevant work experience required, with at least 3 years in leading a team of SW/FW Engineers.
BE/B.Tech, M.Tech – EC/CS required.
Strong coding skills in C, C++, and/or Python.
Experience with Embedded PCIe driver and application development.
Experience in PCIe architecture, Configuration, Address space Allocation, Interrupt, Error Detection, Power-Management, Phy and Link layer.
Experience building and integrating SW for a multi-vendor environment.
Experience with ARM or similar embedded SoC development environment.
Excellent debugging skills.
Comfortable with configuration management, version control & modern software development flow (e.g., Agile).
Good communication, documentation & presentation skills.
Prior experience with FPGA and/or Network Processor software development.
Team player with a strong sense of urgency to meet product schedules.
Be able to work productively and independently.
Desirable Skills:
Familiarity with ORAN M/C/S/U plane.
Familiarity with netconf2, netopeer2 client/server, yang, SysRepo, SyncE, PTP, eCPRI, CPRI.
Experience with development for PetaLinux (Xilinx-based Linux SW package) including development workflow incorporating Xilinx Vivado & Xilinx SDK.
Experience with Xilinx Zynq platform, Vivado Tools (10G Ethernet IP).
Understanding of FPGA HDL (VHDL, Verilog, System Verilog) and/or FPGA PL/RTL.
Experienced in RTOS principles and concepts & hands-on experience in any RTOS.
Prior System on a Chip (SoC) product development experience.
Good understanding of cellular wireless protocols (MAC/PHY).
Experience using command-line Git, GitLab & Jira tools.
Benefits:
Competitive salary and stock options.
Learning and development opportunities.
Employer-paid health Insurance.
Casual, Sick & parental leaves.
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