RTL Design- Design Lead

Be part of the Cadence High-Speed SerDes PHY IP Front end Design team responsible for --Defining microarchitecture of digital blocks involving microcontroller-based designs to meet specifications, optimized for performance metrics of timing, area, and power.-Lead and also hands-on end-to-end ASIC design including RTL implementation and design processes of...

Be part of the Cadence High-Speed SerDes PHY IP Front end Design team responsible for --Defining microarchitecture of digital blocks involving microcontroller-based designs to meet specifications, optimized for performance metrics of timing, area, and power.-Lead and also hands-on end-to-end ASIC design including RTL implementation and design processes of...

Job Summary:As an RTL design lead, you will play a key role in the design and development of complex ASICs and System-on-Chip architectures for various electronic devices. You will be responsible for RTL design, establishing good design practices, translating micro-architecture to efficient RTL, optimizing performance, power efficiency, and area constraints...

RTL Design Lead Location: Bangalore As an RTL design lead, you will play a key role in the design and development of complex ASICs and System-on-Chip architectures for various electronic devices. You will be responsible for RTL design, establishing good design practices, translating micro-architecture to efficient RTL, optimizing performance, power...

Job Summary: As an RTL design lead, you will play a key role in the design and development of complex ASICs and System-on-Chip architectures for various electronic devices. You will be responsible for RTL design, establishing good design practices, translating micro-architecture to efficient RTL, optimizing performance, power efficiency, and area...

Design & synthesize for a complex SerDes IPs in various technology nodes (> 100G rates)Work with Analog design teams to co-develop algorithms, feedback design loops as well as high speed critical digital circuitsGood understanding of working with signal processing IPs in terms of knowing calibrations, PLLs, dividers, FIFO design and reset...

Design & synthesize for a complex SerDes IPs in various technology nodes (> 100G rates)Work with Analog design teams to co-develop algorithms, feedback design loops as well as high speed critical digital circuitsGood understanding of working with signal processing IPs in terms of knowing calibrations, PLLs, dividers, FIFO design and reset...

RTL Design LeadLocation: BangaloreAs an RTL design lead, you will play a key role in the design and development of complex ASICs and System-on-Chip architectures for various electronic devices. You will be responsible for RTL design, establishing good design practices, translating micro-architecture to efficient RTL, optimizing performance, power efficiency,...

Design & synthesize for a complex SerDes IPs in various technology nodes (> 100G rates)Work with Analog design teams to co-develop algorithms, feedback design loops as well as high speed critical digital circuitsGood understanding of working with signal processing IPs in terms of knowing calibrations, PLLs, dividers, FIFO design and reset...

Job Description: B.tech or M.tech with 5+ years of experience on FE tools like Spyglass cdc and spyglass lint. Should have sound knowledge on synthesis and low power. Should have good knowledge on RTL coding and integration with excellent debug skills. Knowledge on git and CC framework will be better.Role involves running FE tools on DSP designs...

Job Description: B.tech or M.tech with 5+ years of experience on FE tools like Spyglass cdc and spyglass lint. Should have sound knowledge on synthesis and low power. Should have good knowledge on RTL coding and integration with excellent debug skills. Knowledge on git and CC framework will be better.Role involves running FE tools on DSP designs...

Hi All, We are Hiring ASIC RTL Design Engineers / Leads. Location: INDIA. Work Mode: Hybrid. Experience: 3 20 Yrs. Expertise in SoC/IP design. * Expertise in IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog. * In depth knowledge on RTL quality checks (Lint, CDC). * Knowledge of synthesis and low power is a plus. * Good...

Job Title: RTL Design EngineerLocation: Bengaluru, Karnataka, IndiaDuration: Full TimeJob description• 5+ years of experience in front end RTL design and front-end tools and flows• Experience in SOC integration, RTL release flows, clocking and reset architecture.• Experience in post RTL checks — Lint, CDC, RDC• Experience in RTL synthesis and...

Job Summary Title/Position: RTL Design- Design Lead Experience: 10+ yearsLocation - Bangalore Education: B.Tech/ M.Tech   Key Responsibilities: ·       Work closely with Business Unit head in defining strategy for the BU ·      Responsible & accountable for engineering execution and deliveries for customer...

Job Summary Title/Position: RTL Design- Design Lead Experience: 10+ yearsLocation - Bangalore Education: B.Tech/ M.Tech   Key Responsibilities: ·       Work closely with Business Unit head in defining strategy for the BU ·      Responsible & accountable for engineering execution and deliveries for customer...

RTL IP/Logic Design Engineers / Design Architect LeadsThis position is for IP Design Engineer Lead/manager role at Samsung Semiconductor India Bangalore, where you will be involved in RTL design, synthesis and verification of various complex IP modules of SSD/Flash storage products. You will be associated in the design development life cycle to support spec...

RTL IP/Logic Design Engineers / Design Architect LeadsThis position is for IP Design Engineer Lead/manager role at Samsung Semiconductor India Bangalore, where you will be involved in RTL design, synthesis and verification of various complex IP modules of SSD/Flash storage products. You will be associated in the design development life cycle to support spec...

RTL Design Engineers / Leads / Managers Experience: ~3 to 18+ YearsLocations: India, Hyd, Delhi (NCR), Chennai, Bangalore, Kerala, Ahmedabad, Pune, Mumbai, Etc).Job Description: Expertise in SoC/IP design.Expertise in IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog.In depth knowledge on RTL quality checks (Lint,...

RTL Design Engineers / Leads / Managers Experience: ~3 to 18+ YearsLocations: India, Hyd, Delhi (NCR), Chennai, Bangalore, Kerala, Ahmedabad, Pune, Mumbai, Etc).Job Description: Expertise in SoC/IP design.Expertise in IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog.In depth knowledge on RTL quality checks (Lint,...

Job Title – RTL Design EngineerJob Description –-Strong in Digital Design-Knowledge of VHDL/Verilog/System Verilog-Lint/CDC/Timing Closure-Knowledge of Validating IP, debugging of failures on target boards, board bring up.-Proficiency in Linux environment.-Good Communication skills.Basic job Deliverables – RTL Coding, IP Design, CDC, LINT, Vivado...