Rtl Design Verification Engineer

1 day ago

Bengaluru, India Whatjobs IN C2 Full time

SOC RTL Design Verification Experience : 4 to 10 Years Location : Bangalore Key Responsibilities: - Verification of SOC RTL (This is a DV Req) : FW-HW co-verification at SOC level, good understanding of SOC boot flow, integration level verification - Development and verification of post-si validation sequences using C/C++ - Create methodology-based (UVM) verification testbenches and components from scratch at SOC level along with re-usability of IP level components. - Experienced with Verilog, System Verilog, and C or C++ - Good understanding of JTAG protocol - Contributes to test plan development. Candidate past experience requirements, - Should have experience in system-level Verification. - DDR prior experience is not mandatory. About Company: ACL Digital, a leader in digital engineering and transformation, is part of the ALTEN Group. At ACL Digital, we empower organizations to thrive in an AI-first world. Our expertise spans the entire technology stack, seamlessly integrating AI and data-driven solutions from Chip to cloud. By choosing ACL Digital, you gain a strategic advantage in navigating the complexities of digital transformation. Let us be your trusted partner in shaping the future.

  • Senior Design verification Engineer

    3 weeks ago

    Bengaluru, India ARF Design Pvt Ltd Full time

    Job Description Skills: SOC Verifcation, ASIC Verification, Design Verification, Universal Verification Methodology (UVM), Open Verification Methodology, System Verilog, Senior RTL Verification Lead / RTL Verification Engineer Are you an experienced RTL Verification professional looking for your next challenge Look no further! Qualifications - BE/ME/MTech/MS...

  • RTL Design Verification Engineer

    7 days ago

    Bengaluru, India ACL Digital Full time

    SOC RTL Design VerificationExperience: 4 to 10 YearsLocation: BangaloreKey Responsibilities:• Verification of SOC RTL (This is a DV Req) : FW-HW co-verification at SOC level, good understanding of SOC boot flow, integration level verification• Development and verification of post-si validation sequences using C/C++• Create methodology-based (UVM)...

  • RTL Design Verification Engineer

    1 week ago

    Bengaluru, India ACL Digital Full time

    SOC RTL Design VerificationExperience: 4 to 10 YearsLocation: BangaloreKey Responsibilities:• Verification of SOC RTL (This is a DV Req) : FW-HW co-verification at SOC level, good understanding of SOC boot flow, integration level verification• Development and verification of post-si validation sequences using C/C++• Create methodology-based (UVM)...

  • RTL Design Verification Engineer

    2 weeks ago

    Bengaluru, India ACL Digital Full time

    SOC RTL Design VerificationExperience: 4 to 10 YearsLocation: BangaloreKey Responsibilities:• Verification of SOC RTL (This is a DV Req) : FW-HW co-verification at SOC level, good understanding of SOC boot flow, integration level verification• Development and verification of post-si validation sequences using C/C++• Create methodology-based (UVM)...

  • RTL Design Verification Engineer

    2 days ago

    Bengaluru, India ACL Digital Full time

    SOC RTL Design VerificationExperience : 4 to 10 YearsLocation : BangaloreKey Responsibilities:• Verification of SOC RTL (This is a DV Req) : FW-HW co-verification at SOC level, good understanding of SOC boot flow, integration level verification• Development and verification of post-si validation sequences using C/C++• Create methodology-based (UVM)...

  • Sr RTL Principal Design Engineer

    1 week ago

    Bengaluru, India Cadence System Design and Analysis Full time

    RTL Design Engineer for Interface Controller IP development team.Position is based in Bangalore or Noida.The role would include design and support of the RTL of the PCIe/CXL/IDE/UALink IP solution of Cadence.The work involved will be working with the existing RTL, addition of new features into the RTL, ensuring various customer configurations are clean as...

  • Sr RTL Principal Design Engineer

    2 weeks ago

    Bengaluru, India Cadence System Design and Analysis Full time

    - RTL Design Engineer for Interface Controller IP development team.- Position is based in Bangalore or Noida.- The role would include design and support of the RTL of the PCIe/CXL/IDE/UALink IP solution of Cadence.- The work involved will be working with the existing RTL, addition of new features into the RTL, ensuring various customer configurations are...

  • Sr RTL Principal Design Engineer

    2 days ago

    Bengaluru, India Cadence System Design and Analysis Full time

    RTL Design Engineer for Interface Controller IP development team.Position is based in Bangalore or Noida.The role would include design and support of the RTL of the PCIe/CXL/IDE/UALink IP solution of Cadence.The work involved will be working with the existing RTL, addition of new features into the RTL, ensuring various customer configurations are clean as...

  • Sr rtl principal design engineer

    17 hours ago

    Bengaluru, India Cadence System Design And Analysis Full time

    RTL Design Engineer for Interface Controller IP development team.Position is based in Bangalore or Noida.The role would include design and support of the RTL of the PCIe/CXL/IDE/UALink IP solution of Cadence.The work involved will be working with the existing RTL, addition of new features into the RTL, ensuring various customer configurations are clean as...

  • Sr RTL Principal Design Engineer

    5 days ago

    Bengaluru, India Cadence System Design and Analysis Full time

    RTL Design Engineer for Interface Controller IP development team. Position is based in Bangalore or Noida. The role would include design and support of the RTL of the PCIe/CXL/IDE/UALink IP solution of Cadence. The work involved will be working with the existing RTL, addition of new features into the RTL, ensuring various customer configurations are clean as...