Principal Ip Design Engineer

3 weeks ago


Ibrahim Bagh Lines, India Mulya Technologies Full time

Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / HyderabadPrincipal / Senior Staff IP Design Engineer: 2 PositionsA US based well-funded product based startup looking for talented ASIC / RTL / Logic Design Engineers. A US based well-funded product-based startup looking for Highly talented ASIC / RTL / Logic Design Engineers for the following roles.Principal Interconnect Fabric Microarchitecture & IP Logic Design EngineerResponsibilitiesCreating micro-architecture and detailed design documents for design keeping in mind performance, power, area requirements.Perform RTL coding for complex design blocks in Verilog.Function/performance simulation check and debug.Understanding on Lint/CDC/Synthesis checks, power analysis and LEC check.Understanding and defining constraints.Issue and track bug reports from beginning to closure.Work with the team to deliver quality designs.Work very closely with verification and back-end team. Key QualificationsB.E/M. Tech with 8-12 years of experience in ASIC RTL development.Solid experience with System Verilog.Experience with Lint, CDC.Contact:UdayMulya "Mining The Knowledge Community"



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