Sivaltech | Senior Design and verification Engineer

5 days ago

Bengaluru, India Sivaltech Full time
About the Company - Sivaltech is an established ASIC/FPGA, Analog, Embedded Software design services company with our headquarter in Milpitas, branches in Bengaluru and Hyderabad. Sivaltech is a preferred design services partner for Fortune 500, and start ups in the semiconductor world. With experience in several domains like GPUs, CPUs, wireless, communications, Medical, Broadband, Consumer Electronics, we are well placed to solve our client's complex design issues.
About the Role :
We have openings for 4+ years IP/ASIC/Soc verification engineers for Bengaluru location
having experience in the following skill sets
1) SOC Verification engineers with SV UVM strong in SV Programming and Debugging skills.
2). IP Verification Engineers who have worked on PCI, Display, HDMI
Strong with Linux and Programming skills plus Strong in SV UVM.
Responsibilities -
Working experience in IP/ASIC/ SoC verification
Should have the expertise to develop block level / system level verification environments using System Verilog and UVM / OVM
Experience to develop BFMs / Checkers / monitors / Scoreboards
Should have the capability to debug test failures to find the root cause
Should have worked on code / functional coverage
Experience in constrained random testing is a plus
Experience in PCIe / Ethernet / DDR / USB / Bluetooth protocols will be PLUS
Develop and maintain verification environment in UVM (Universal Verification Methodology)
Define and review verification test plan with architecture team and design team
Verify the design with directed and constraint random functional parameters
Report and analyze verification coverage of design features and parameters
Drive the verification to reach coverage target
Take responsibility in the verification of blocks, sub-systems and top-level environments
Qualifications - Bachelors or Masters degree in Engineering.
Preferred Skills/ Experience :
4-10 years of experience in IP DV, SoC Design and verification

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