Mulya Technologies | Lead Analog Layout Engineer | bangalore
1 week ago
Senior /Lead Analog Layout EngineerBangalore
To work with the best experts in the industry.To develop capability to work effectively in a technically challenging fast-paced and rapidly changing environment.To work on cutting edge analog semiconductor processesTo innovate on core technology in semiconductor process, packages & influence decisions that have wide business impact across many products & teams.To directly influence the features, differentiation & cost entitlement of the product at release to market.To define, as a team, long-term roadmap of automation flows and methodologies to continuously improve productivity.To build strong, influential relationships with domain expertsTo develop good communication, interpersonal skills while interacting with worldwide cross functional expertsTo learn identifying risks across domains and adapt to support changing prioritiesTo present analysis and conclusions to internal customers and business leaders in a comprehensive and effective manner.To mentor junior engineers and interns.
What will you be doing in this role? (Responsibilities)
Lead and/or Own all the aspects pertaining to the layout of a block/device, this includes but not limited to schedule, planning, tracking and communicating the layout milestones, floorplan, power-plan, constraint management, layout, verification, extraction, drive and attend reviews, interface with assembly team for package requirements, interface with the fab , for tapeout/PG,Develop individual block layout specification based on top level layout requirements.Aggressively drive area reduction, metal usage reduction while meeting EM and thermal capabilityWork on cutting edge package developments including Hotrod-QFN, Thin-SOTs and VSSOPsWork on layout DFM constraints like matching, parasitics, EM, ESD, Latch-up, WPE, LoD etc.Aggressively drive productivity improvement initiatives through automation, flow-methodologies improvements, checklists etc.Working with packing team for new package development, optimize layout to fit in to multiple packages
Required Qualifications:
Experience: 3-8 years in Analog Layout DesignTools:Fully conversant with Virtuoso LE/XLS, Assura/Calibre/Hercules for verification and extraction, basic knowledge of perl/skill/shell scripting desirable.Must have done few blocks from floorplan to tape-out/PG.Layout Basics:Block/Toplevel Layout (Floorplanning, Power Planning, Bump planning, Clock route planning)Device Layout (Knowledge of best layout practices for minimizing impacts of process mismatches through various matching techniques like common centroid, inter-digitation, addition of dummies etc, matching vs. area tradeoffs, best practices for BJTs, MOS, Resistor layout. Must have completed the layout of basic building blocks like BG, TSD, POR, Oscillators, LDO, IOs etc)Interconnect Design (Techniques for EM & IR Drop mitigation, Parasitics minimization, Matching for R/L/C, Crosstalk Mitigation through shielding/isolation etc, Antenna Effect mitigation, Step Coverage/Density effect mitigation)ESD & Latch-up (Knowledge of impact of bus resistances, ESD transistor/interconnect DRC, EM constraints, effective guard-ring techniques )Noise (Knowledge of and techniques to reduce noise coupling and/or generation through Substrate taps, Guard rings, Shielding, Decoupling Caps, Bondwires, DNW Isolation, Substrate Coupling etc)Behavioral:Excellent written and verbal communication skills and should be a good team playerDemonstrate an attitude with highest levels of integrity and commitment to success. Every assignment small or big needs to be driven with a complete ownership mindset
Contact:UdayMulya "Mining The Knowledge Community"
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