RTL Engineer/Lead
3 weeks ago
Experience
3-10 years
Role:
IP/SOC design engineer working in the area of micro architecture, logic design, RTL
coding, verification, supporting validation/software, silicon implementation support
activities (ex: synthesis, timing, DFT,p&r)
Job Requirements:
3+ years of hands-on experience with SoC design Worked on DDR/LPDDR/PCI Express/USB 2.0,3.0 protocols experience with MCU and APU class processors experience with AXI/AHB or other standard on-chip buses Good knowledge of processor based SoC architecture Excellent debugging skills Broad understanding of RTL-to-Tapeout methodology Prior experience with pre and post silicon debug
Nice to have:
Prior experience with QSPI, PSRAM, low power implementations Hands-on experience with Synthesis and Logic Equivalency checking Hands-on experience with FPGA debug Experience with Verilog/PSL/OVA assertions
Essential Requirements:
BTech/MTech in EE or equivalent with 3-7 years of experience Outstanding analytical and critical thinking skills. Be a good contributor to the organization and a team player
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