Senior Verification Engineer

Senior Verification EngineerLocation: Bangalore/HyderabadExperience: 4+ years1Must have very good System Verilog/UVM experienceMust have expertise in PCI gen6 and CXL3.1or Ethernet bus protocolsHave experience in IP/SoC VerificationExpertise in AMBA/AXI bus protocols and ARM CPUExperience in developing functional verification environments including the...

SoC/SS Lead Engineers : Experience in development of UVM based verification environments from scratch. Experience with Design verification of ta-center applications like Video, AI/ML and Networking designs. Experience in Mercurial (Hg), Git or SVN. Experience with low power design. Experience working across and building relationships with cross-functional...

SoC/SS Lead Engineers : Experience in development of UVM based verification environments from scratch. Experience with Design verification of ta-center applications like Video, AI/ML and Networking designs. Experience in Mercurial (Hg), Git or SVN. Experience with low power design. Experience working across and building relationships with cross-functional...

Job Title: AMS Verification Engineer Experience Required: Minimum 4 years relevant experience is required. Location: Bangalore, Hyderabad, Noida, Chennai, Ahmedabad, Pune Key Responsibilities: Min 4 Years of overall experience in ASIC Verification Should have worked on AMS Verification for minimum of 2 years Develop and execute verification plans for AMS...

Senior Engineer/Engineer – ASIC Design Verification LOCATION: Highly experienced with defining block, sub-system and SOC top level test plans. Relevant experience with one or more of PCIe, NVMe, NAND, DDR and CPU sub-systems. Deep understanding and knowledge of verification methodologies, flows and quality metrics The incumbent will be responsible for...

POSITION TITLE: Senior Engineer/Engineer – ASIC Design Verification LOCATION: Noida/ Bangalore/ Hyderabad/ Pune/ Chennai/ AhmedabadROLE & RESPONSIBILITIES An expert level with developing UVM-based SV test-benches.Highly experienced with defining block, sub-system and SOC top level test plans.Relevant experience with one or more of PCIe, NVMe, NAND, DDR and...

POSITION TITLE: Senior Engineer/Engineer – ASIC Design Verification LOCATION: Noida/ Bangalore/ Hyderabad/ Pune/ Chennai/ Ahmedabad ROLE & RESPONSIBILITIES An expert level with developing UVM-based SV test-benches. Highly experienced with defining block, sub-system and SOC top level test plans. Relevant experience with one or more of PCIe, NVMe, NAND, DDR...

Senior Design verification Engineer Mandatory Skill : PCIE Experience : 5 years Design Verification Engineer responsible for ensuring functional correctness of ASIC/SoC designs. Key Task: Develop and execute verification plans for complex digital designs. Coverage: Achieve functional and code coverage targets through constrained random and directed testing....

Senior Design verification Engineer Mandatory Skill : PCIE Location : Bangalore Experience : 5 years Design Verification Engineer responsible for ensuring functional correctness of ASIC/SoC designs. Key Task: Develop and execute verification plans for complex digital designs. Methodology: Use UVM/SystemVerilog to create testbenches, write test cases, and...

Senior Design Verification Engineer Job Description: SV / UVM Test bench development and test cases coding. Code and Functional coverage analysis and closure. Work with team for verification closure. Experience with python or any other scripting language is a plus. Bus protocols AXI / APB / UART/ IJTAG protocol working knowledge is an advantage. Experience :...