Senior Die-Package co-design flow

3 weeks ago

bangalore, India NXP Semiconductors Full time
Job Title: Die Package Co-design Lead Engineer
Location: Bangalore/Noida
Summary: Drive the development, testing and maintaining of state-of-the-art IC-package co-design tool and flow. You will be working within the department of Design Enablement Engineering Support and in close collaboration with RF-EM Design Enablement department in NXP CTO. The work is performed in close co-operation with the back-end design team, package innovation team, other design enablement departments, business line designers and architects, and leading EDA vendors.
Responsibilities
Collect the requirements and specifications for co-design flow of IC, Package (and eventually PCB) in close cooperation with the design teams.
Create a flow that unify the entire design fabrics (IC, Package, and PCB) into a common design environment with well-known EDA tools.
Propose recommendation for flow optimization and characterization of the designs under development.
Manage the tool & flow verification and regression testing in an efficient way towards automation.
Provide guidelines and recommendations to the design team on how to use of newly developed flows.
Cooperate with EDA vendors (bugfixes, enhancement requests, etc.) in sync with the design and package innovation teams.
Align co-design flow with flows and methodologies that will be used for electromagnetic simulations,
Document findings in a form of technical reports and provide recommendations to the design teams.
Contribute to the overall improvement of the existing design flows and methodologies.
Additionally, you can also contribute to the following activities:
Develop / maintain a broad knowledge of technical developments in the IC design domain.
Provide first-line and expert support for co-design of die, package & PCB to the design community.
Contribute to improvements in next-generation RF designs (Radar, 6G, Radio, …).
Qualification:
Master’s degree in Electronics engineering, Electrical Engineering, Applied Physics
Familiar with the Analog – RF IC, IC package, PCB design process in general is must.
Advanced industrial experience in Analog and RF domain (die, package and PCB) is recommended, especially knowledge of Cadence Virtuoso for IC designs and Cadence Allegro for package and PCB designs is highly recommended.
Expert user of Cadence (Virtuoso RF, Allegro), Ansys-HFSS, ADS-RFPro is a plus.
Minimum 5 years of experience in IC and package design.
knowledge of Electromagnetic 2.5 / 3D simulations, specifically with available commercial tools is plus.
Knowledge with programming languages in a plus.
Excellent communication skills and team player.
Proficient in communicating and writing technical documentation in English.
Able to work in a dynamic environment.
NXP Semiconductors N.V. (NASDAQ: NXPI) enables secure connections for a smarter world, advancing solutions that make lives easier, better, and safer. As the world leader in secure connectivity solutions for embedded applications, NXP is driving innovation in the automotive, industrial & IoT, mobile, and communication infrastructure markets. Built on more than 60 years of combined experience and expertise, the company has approximately 34,000 employees in more than 30 countries.
Career Development Opportunities
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We believe that a key component to growing our business is to develop our people. To enable you to grow your career at NXP, we offer online and offline learning opportunities to help you develop some of your core and professional skills.
We Are NXP Visit our careers website for more job information.
Commitment At NXP.
We recognize we can be a powerful change agent as we continue to deliver innovative solutions that advance a more sustainable future. We remain steadfast in our commitment to sustainability and making measurable year-on-year progress. Also, we aim to create an inclusive work environment and we will not tolerate racism, discrimination or harassment of any kind. We have programs in place focused on diversity, inclusion and equality.

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