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SENIOR LOGIC DESIGN ENGINEER – Core Execution(VSU) Unit

2 months ago

Anantapur, India Mulya Technologies Full time
SENIOR LOGIC DESIGN ENGINEER – Core Execution(VSU) Unit
Fortune 100 Organization
Location: Bangalore
Introduction
We work is more than a job - it's a calling: To build. To design. To code. To consult. To think along with clients and sell. To make markets. To invent. To collaborate. Not just to do something better, but to attempt things you've never thought possible. Are you ready to lead in this new era of technology and solve some of the world's most challenging problems? If so, lets talk.
Your Role and Responsibilities
Lead the architecture, design and development of Processor Core Vector-Scalar Execution unit for high-performance Systems.
Architect and design Fixed point/Floating point/Vector/SIMD/Crypto instructions of a high performance processor CPU
Develop the features, present the proposed architecture in the High level design discussions
Estimate the overall effort to develop the feature.
Estimate silicon area and wire usage for the feature.
Develop micro-architecture, Design RTL, Collaborate with other Core units,
Verification, DFT, Physical design, Timing, FW, SW teams to develop the feature
Signoff the Pre-silicon Design that meets all the functional, area and timing goals
Participate in post silicon lab bring-up and validation of the hardware
Lead a team of engineers, guide and mentor team members, represent as Logic
Design Lead in global forums.
Required Technical and Professional Expertise
8 or more years of demonstrated experience in architecting and designing Execution unit of CPU
Hands on experience of implementing Arithmetic/Crypto/SIMD functions
Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA
Experience with high frequency, instruction pipeline designs
At least 1 generation of Processor Core silicon bring up experience
In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs)
Proficiency of RTL design with Verilog or VHDL
Nice to haves
Knowledge of instruction dispatch and load/store units
Knowledge of verification principles and coverage
High-level knowledge of Linux operating system
Knowledge of one object oriented language and scripting language
Understanding of Agile development processes
Experience with DevOps design methodologies and tools
Contact:
Uday
Mulya Technologies
"Mining The Knowledge Community"