PnR Low-power flows
2 weeks ago
#Urgent_Opening_for_Canvendor#Hiring: PnR Low-power flows (Design Engineer) (7+ years) | Hyderabad | Immediate Joiners Preferred Location: Hyderabad, India Experience: 7-14 years Notice period: Immediate#Key_Requirements:AMD experience is a MUST Supporting Multi-Voltage Place and Route workflows for designs at 6nm, 3nm, and 2nm technology nodes Develop and support customized solutions using TCL/PERL scripts to overcome tool defects or limitations w.r.t Multi-voltage PNR implementation Qualifying tool versions and deploying new features into the workflow. Solid understanding of low power flows includes, UPF concepts, power-gating, isolation, level-shifter, voltage_areas, power-state tables, electrical checks using FM & VSI Updating current workflows to incorporate new capabilities as needed. CAD PNR low-power flow regression Proficient with Synopsys Fusion-Compiler or ICC2 Strong grasp of scripting languages like PERL and TCL, along with robust debugging skills. Experienced in synthesis, PnR, VSI, FM and Calibre workflows Skilled in using physical verification tools Excellent communication skillsIf interested kindly share your updated CV to
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PnR Low-power flows
4 weeks ago
New Delhi, India Canvendor Full time#Urgent_Opening_for_Canvendor#Hiring: PnR Low-power flows (Design Engineer) (7+ years) | Hyderabad | Immediate Joiners PreferredLocation: Hyderabad, IndiaExperience: 7-14 yearsNotice period: Immediate#Key_Requirements:- AMD experience is a MUST - Supporting Multi-Voltage Place and Route workflows for designs at 6nm, 3nm, and 2nm technology nodes - Develop...
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SoC PnR Lead/ Principal Engineer
3 days ago
New Delhi, India SEMIFIVE Full timeSoC PnR Lead / Principal EngineerAbout Semifive Founded in Seoul in 2019, SEMIFIVE is basing its foundation on Korea’s semiconductor design competency that was amassed for more than 20 years. With expertise spanning front-end to back-end design, SEMIFIVE has become the fastest growing silicon design company that offers the most comprehensive design...
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Physical Design Manager
3 days ago
New Delhi, India BITSILICA Full timeWhat we need: ✅ 12+ Years of PD experience ✅ Knowledge on entire PD Process from Netlist to GDS Generation ✅ Experience in Synthesis, Low Power, PnR, STA, and Timing ClosureWhat you'll do: * Proven experience in Synthesis, PnR, STA, and Timing Closure * Familiarity with Synopsys / Cadence / Mentor tool flows * Capable of owning end-to-end Physical...
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Senior Physical Design Engineer
4 weeks ago
New Delhi, India LeadSoc Technologies Pvt Ltd Full timeResponsibilities:- Block/SOC-level Physical Design from Netlist to GDSII including floorplanning, power planning, placement, CTS, routing, extraction, and DFM. - Perform congestion, timing, IR/EM, power and QoR analysis and drive closure. - Execute sign-off flows: STA, DRC/LVS, Antenna/ERC, LEC, and ECO (timing & functional). - Implement ECOs and ensure...
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Senior Physical Design Engineer
3 days ago
New Delhi, India Best NanoTech Full timeBest Nanotech is expanding its VLSI team in Bengaluru!We are looking for a Senior Physical Design Engineer with 7+ years of experience to take ownership of complex high-speed blocks from Netlist to GDSII in advanced technology nodes (5nm/3nm).Position: Senior/Lead Physical Design EngineerLocation: Bengaluru (On-site/Hybrid)Experience: 7+ YearsYour Impact:-...
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Sr. Design Engineer
2 weeks ago
New Delhi, India ACL Digital Full timeSr. Design Engineer - PPRTL / Prime PowerJob Description:- Experience in ASIC design flow and EDA tools experience such as PPRTL, PowerArtist and PrimePower or other power analysis/simulation tools - Analyze design metrics and make implementation choices to optimize PPA - Scripting language experience: Python, perl, shell preferred. - Exposure to RTL design...
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Sr. Design Engineer
3 weeks ago
New Delhi, India ACL Digital Full timeSr. Design Engineer - PPRTL / Prime PowerJob Description: Experience in ASIC design flow and EDA tools experience such as PPRTL, PowerArtist and PrimePower or other power analysis/simulation tools Analyze design metrics and make implementation choices to optimize PPA Scripting language experience: Python, perl, shell preferred. Exposure to RTL design and...
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Sr. Design Engineer
1 week ago
New Delhi, India ACL Digital Full timeSr. Design Engineer - PPRTL / Prime PowerJob Description: Experience in ASIC design flow and EDA tools experience such as PPRTL, PowerArtist and PrimePower or other power analysis/simulation tools Analyze design metrics and make implementation choices to optimize PPA Scripting language experience: Python, perl, shell preferred. Exposure to RTL design and...
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Senior CAD Flow Specialist
1 week ago
delhi, India beBeeAutomation Full timeJob Title:Senior CAD Flow EngineerJob Description:We are seeking a seasoned Senior CAD Flow Engineer to develop, maintain and enhance Physical Design (PD) CAD flows for block-level and full-chip implementation.The ideal candidate will be responsible for:Developing flow setup for Synthesis, Floorplanning, Power Planning, PnR, CTS, Routing and ECO...
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Lead MTS Physical Design
1 week ago
New Delhi, India Semicon MNC Full timeResponsibilities:Complete ownership of Physical Design activities from Floorplan to GDS including PnR,STA,Physical Verification, Take complete ownership for implementation of both Top/Block level designs. Responsible for independent planning and execution of all aspects of physical design including synthesis, floor planning, place and route, Clock Tree...