Memory Layout Engineer

11 hours ago

Bengaluru, India UST Full time
Job Description: Memory Layout Engineer
Experience - 2+ years
We are seeking a highly skilled and experienced Memory Layout Engineer to join our team. The ideal candidate will have hands-on expertise in designing and integrating layouts for advanced memory blocks across leading-edge process technologies. You will play a critical role in developing and verifying memory compilers with a strong focus on ultra-deep sub-micron layout challenges.
Key Responsibilities:
Memory Building Block Layout Design:
Hands-on experience with designing layouts for essential memory components such as:
Control logic
Sense amplifiers
I/O blocks
Bit-cell arrays
Decoders
Process Technology Expertise:
Proven experience in working with advanced process nodes, including:
16nm, 14nm, 10nm, 7nm, 5nm, 3nm and FinFET technologies.
Physical Verification:
Expertise in performing DRC (Design Rule Check), LVS (Layout Versus Schematic), and density verification.
Ability to identify and clean physical design issues across the compiler space.
Top-Level Memory Integration:
Proficiency in integrating memory layouts at the top level, ensuring seamless compatibility with the larger design.
IR/EM Issues Handling:
In-depth understanding and hands-on resolution of IR drop and electromigration (EM) challenges in memory layouts.
Tool Proficiency:
Hands-on experience with layout design tools, particularly Cadence .
Experience with physical verification tools from Cadence , Mentor , and Synopsys .
Knowledge of Ultra-Deep Sub-Micron Challenges:
Strong understanding of layout design challenges at ultra-deep sub-micron scales.
Expertise in adhering to DFM (Design for Manufacturability) guidelines.
Memory Compiler Development:
Experience or strong interest in developing memory compilers, addressing layout-related issues, and ensuring optimization.
Team Collaboration and Customer Engagement:
Demonstrated ability to work as part of a cross-functional team.
Excellent communication skills and the ability to work with external customers and stakeholders.
Preferred Qualifications:
Bachelor's or Master's degree in Electronics, Electrical, or related Engineering fields.
Proven track record of working on complex memory layouts and verification in the semiconductor domain.
Strong analytical and problem-solving skills.
Self-motivated with a proactive approach to design and debugging challenges.
This role offers an exciting opportunity to work on cutting-edge technologies with a team of experts. If you are passionate about memory layout design and thrive in a collaborative, innovative environment, we encourage you to apply

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