AMS Verification

MNC client of ConnectproLocation- AhmedabadExperience- 4+ yrs· Behavioral modeling: Verilog, Wreal or SV-RNM -Full· AMS Verification for SoC or IPs -Full· Test plan preparation as per the dynamics of product specifications - Full· Dealing challenges with AMS methodologies of Cadence: irun/xrun or Synopsys : XA-VCS or Mentor Eldo ADMS -Partial·...

ResponsibilitiesReview existing company designs and understand communication standardsEstablish a state-of-the-art AMS verification environmentCo-develop an AMS verification plan with Digital/Analog teams from chip specificationExecute plan and debug issues with teamDevelop test benches and modelsProvide feedback to design teams for AMS netlist...

ResponsibilitiesReview existing company designs and understand communication standardsEstablish a state-of-the-art AMS verification environmentCo-develop an AMS verification plan with Digital/Analog teams from chip specificationExecute plan and debug issues with teamDevelop test benches and modelsProvide feedback to design teams for AMS netlist...

About the Role-Lead AMS IP/chip verification, including reviewing design specifications and defining and executing a verification plan to ensure compliance with specifications.Architect, implement, and automate analog, digital, and AMS test benches to verify pre-silicon designs.Build System Verilog real number analog behavioral models, monitors, and checkers...

About the Role -Lead AMS IP/chip verification, including reviewing design specifications and defining and executing a verification plan to ensure compliance with specifications.Architect, implement, and automate analog, digital, and AMS test benches to verify pre-silicon designs.Build System Verilog real number analog behavioral models, monitors, and...

ResponsibilitiesReview existing company designs and understand communication standardsEstablish a state-of-the-art AMS verification environmentCo-develop an AMS verification plan with Digital/Analog teams from chip specificationExecute plan and debug issues with teamDevelop test benches and modelsProvide feedback to design teams for AMS netlist...

Location: BangaloreExperience: 4 + yearsJob description• Review specifications, extract features, define and execute verification plan.• Develop top/block level Mixed Signal and Digital testbench and generate directed/ constrained random tests• Build and reuse real numbered analog behavioral models, monitors, and checkers for RF/Mixed-Signal blocks.•...

Who are we and what do we do?The Custom product business is delivering industry leading custom IC system solutions including display and touch power products, camera PMICs, charger power products, power switches/muxes, Laser drivers, High speed communication interfaces. Our solutions integrate signal chain and power components, that enable TI customers to...

Senior engineer -AMS/IO layoutJob Locaiton: hyd and Noida.Exp : 4 to 15 yrs.Job DescriptionExcellent work experience in IO Layout design in advanced Fin FET processes like 16nm, 12nm, 10nm, 7nm, 5nm, 3nmHands on experience in any or multiple critical blocks IO blocks like GPIO , SDIO , DDR IO etc along with the SERDES blocks such as SERDES, PHY, HDMI, PLL,...

Job Title:Senior Analog Mixed Signal Verification EngineerAbout the Company:Mulya Technologies is a top-tier semiconductor organization that empowers innovation and excellence in the field of mixed-signal verification.Job Description:We are seeking a highly skilled Senior Analog Mixed Signal Verification Engineer to join our team. In this role, you will be...

Job DescriptionAs a Principal Memory Circuit Design Verification Engineer you will work in a highly innovative, motivated, Upbeat, and dynamic design team capable of verifying complete products using innovative memory technologies. You will need to have the ability to drive the team and the overall verification effort to ensure the timely delivery of a...

Responsibilities:Complete ownership of IP/subsystem/SOC DV ownership right from spec definition till the post silicon verification and solving the customer issues on need basis. This includes:Active involvement with architecture team during the spec definition phaseVerification strategy definition along with Verification plan to meet 100% spec to regression...

Responsibilities:Complete ownership of IP/subsystem/SOC DV ownership right from spec definition till the post silicon verification and solving the customer issues on need basis. This includes:Active involvement with architecture team during the spec definition phaseVerification strategy definition along with Verification plan to meet 100% spec to regression...

We are Texas Instruments, a world-leading innovator in analog and embedded processing solutions. Our portfolio of power management ICs is the largest and most comprehensive in the industry, addressing various market segments including Intel servers, AMD servers, personal electronics, and automotive.Our Power Stage development team takes full product...

Top10 Semiconductor Organization in the WorldBangaloreWhat will you be doing in this role? (Responsibilities)Responsible for developing a coverage driven verification plan by working closely with System, APPS and design team to ensure first pass silicon successModel development using RNM/EENETDevelop test scenarios, automation and create stimulus to verify...

About the group/ teamThis requirement is open for Analog Signal Chain (ASC) -Interface (INT) group at Texas Instruments India. This requirement is open for Analog Signal Chain (ASC) -Interface (INT) group at Texas Instruments India. Our charter is to develop highly differentiated voltage translation, Ground Busters and SPI/I2C/I3C IO Expanders, products...

About the group/ teamThis requirement is open for Analog Signal Chain (ASC) -Interface (INT) group at Texas Instruments India. This requirement is open for Analog Signal Chain (ASC) -Interface (INT) group at Texas Instruments India. Our charter is to develop highly differentiated voltage translation, Ground Busters and SPI/I2C/I3C IO Expanders, products...

About the group/ teamThis requirement is open for Analog Signal Chain (ASC) -Interface (INT) group at Texas Instruments India. This requirement is open for Analog Signal Chain (ASC) -Interface (INT) group at Texas Instruments India. Our charter is to develop highly differentiated voltage translation, Ground Busters and SPI/I2C/I3C IO Expanders, products...

Responsibilities:Complete ownership of IP/subsystem/SOC DV ownership right from spec definition till the post silicon verification and solving the customer issues on need basis. This includes:Active involvement with architecture team during the spec definition phaseVerification strategy definition along with Verification plan to meet 100% spec to regression...

Responsibilities:Complete ownership of IP/subsystem/SOC DV ownership right from spec definition till the post silicon verification and solving the customer issues on need basis. This includes:Active involvement with architecture team during the spec definition phaseVerification strategy definition along with Verification plan to meet 100% spec to regression...