SOC Performance Modeling

3 weeks ago


Bengaluru, India Samsung Electronics Full time

Lab Overview:

Samsung Research India - Bangalore (SRI-B) is the advanced R&D hub of Samsung to prepare the future of Samsung Electronics. We are defining the high performance SoC architecture development for various Galaxy device lineups. This group collaborates with Samsung's strategic SoC partners, Samsung MX headquarter team, and key R&D teams around the globe to innovate and reinvent technology that will positively impact millions of people around the world via the Galaxy flagship products.


Position Summary:

We are looking for a SOC performance architect to build architecture models for analysis of new SoC architectures and features for next generation mobile products. Solid architecture foundation and SoC modeling experience is desired for success for this role.


Position Responsibilities:

  • Perform high-level performance modeling and analysis of hardware features, applications, benchmarks, and uses cases.
  • Develop complex SoC performance models to help evaluate PPA (power, performance, area) targets including CPU, GPU, ISP, NPU – particularly around mobile platforms.
  • Leverage Industry standard tools and/or create in house tools to speed up performance evaluation and analysis.
  • Analyze system-level architectural trade-offs (across mapping of workload to CPU, GPU, NPU, ISP, memory subsystems, and system so(ware).
  • Evaluate architecture proposal performance benefits in collaboration with SoC Architects.


Required Skills:

  • Undergraduate with 12+, master's with 10+ or PhD with 7+ years of combined education, training, and experience in Computer Science/Engineering or equivalent field
  • Proficiency in architecture analysis and performance modeling, ranging from simple analytical models to complex cycle accurate performance model and correlation.
  • Strong modeling and simulator development skills and able to code in SystemC, C, C++, Python and similar programming languages.
  • Experience with industry standard performance and power modeling tools.
  • Deep experience modeling SoC architectures and understanding the challenges involved in integrating internal/external IP and analyzing system-level performance and behavior.
  • Knowledge of the following: CPU, Interconnect and bus protocols and memory subsystem design - including memory subsystems, GPU, and NPU
  • Ability to evaluate architecture proposals, internal and external IP features.


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