Senior Technical Staff Engineer-Verification
1 month ago
Define and develop verification environmentsWrite verification plans, and documentationGenerate test bench and automatic regression plansBe responsible for verification architecture, simulations, verifications, and debugging of circuit and logic designsComplete block-level verification and chip level verificationBring a self-motivated and enthusiastic approach that will achieve any newrequirements and overcome all challengesAble to work mostly independently and handle complex SoC Verification platform. Able to debug the RTL for design intent and Interface with cross-functional teams and collaboration in all verification related activities
Requirements/Qualifications:
Minimum of 16 years related proven silicon design or verification work experienceHands on project experience with leading edge verification methodologies like OVM/UVMOne of the Protocol knowledge areas AXI/AHB/DDR/PCIe is mustHands on project experience in coverage/assertion driven verificationKnowledge of IC chip design, development flow, process, and methodologyKnowledge of CMOS logic design, circuit design, and circuit analysisProficient in HDL languages System Verilog, Verilog and VHDLGood knowledge of UNIX shell scripting, Perl and TCL scripting.Good knowledge and understanding of CMOS device operation and characteristicsProven experience in writing verification plans and test bench development, simulation, and debuggingProficient with UNIX environment, and CAE/CAD tools such as schematic capture, simulation, design verificationMust be able to learn new technologyGood analytical and problem-solving skillsExcellent written and verbal communication in English.Experience dealing with and communicating at different levels of the organization
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