Director, Verification

4 weeks ago

bangalore, India L&T Semiconductor Technologies Full time
Role - Director, Verification
Stream - Customer Focused Product Development for Mobility, Industrial, Energy & Telecom
Reporting To - Chief Development Officer / Global Head of Engineering
Location -Bengaluru
COMPANY DESCRIPTION
L&T Semiconductor Technologies (LTSCT), a fully owned subsidiary of L&T, is the first major Indian Semiconductor product company - a fabless company for designing & delivering Smart Devices for Global Customers. A company that provides Semiconductor Devices and Technology partnerships by helping customers realise energy efficient, high-performance systems to benefit from data, electrification and software defined technology trends.
Harnessing the engineering mastery of L&T, LTSCT is forging a path to a world-class semiconductor ecosystem rooted in India. We aim to rewrite the rules of cutting-edge technology through relentless innovation to foster a vibrant culture of ingenuity, fuelling progress on every chip.
We have a presence in four prominent geographies i.e. US, Europe, Japan and India, with offices in Austin, Munich, London, Tokyo, Bangalore and Chennai.
JOB DESCRIPTION
LTSCT’s Chief Development Organization and Global Engineering team is a central engineering organization responsible for developing and delivering Systems-on-a-Chip (SoCs) for LTSCT's Automotive, Industrial, Energy and Telecom infra business lines. The team is challenged to produce industry-leading solutions covering very cost-sensitive, low power devices to highly integrated, high performance, multi-domain devices compliant with the latest automotive and industrial safety and security standards.
AREAS OF RESPONSIBILITY:
Responsibilities include resource management, project scheduling, execution, and setting high-level technical vision. Projects span a variety of business lines, and designs will need to meet a wide range of power/performance/area goals, depending on the product. Engagement and collaboration across global sites is a key aspect of this role as alignment of methods is essential and sharing of resources is common. Strong technical, communication, and consensus building skills will be required as well as a demonstrated ability to influence solutions across a global organization. The ideal candidate will partner with local and global SoC teams to drive best practices with a target of productivity improvement.
Lead SoC RTL and Verification R&D team driving technical execution and best in class methodologies used in the design of advanced microcontrollers and microprocessors.
In this role you will also lead and build this high performance SoC Verification team, including training and mentoring NCG’s and developing next level verification leads.
Fully own RTL delivery for a multitude of projects
Responsible for developing team members goals and development plans ensuring a high performing SoC verification team.
Work closely with system architects to define high level specifications that are implementable and robust.
Interface with verification/validation teams to ensure design quality and robustness.
Work with various EDA vendors to deploy next generation tools.
Build strong collaboration with other R&D teams such as Verification, digital IP, Design Enablement, Emulation, and Validation to achieve project milestones.
Promote continuous improvement to design techniques to ensure ‘Zero Defect’ chips.
Collaborate with SME’s and key leaders in architecture, systems, emulation, SoC design, software, physical design, and IP teams developing key technical networks to influence overall design improvements and verification methodologies.
Responsible for developing detailed Technical SoC verification execution plans, including resource schedules, progress reports and tracking milestones, managing technical risks, and providing mitigations to meet schedule quality and costs commitments. Communicate across technical teas as well as provide executive level presentations.
Complete ownership for SoC verification quality sign-offs ensuring all deliverables for team hand-offs.
Drive best in class verification methodologies collaborating with global internal and external SME’s and developing adoption and compliance processes. Including, driving key innovation strategies which significantly impact efficiency and quality for overall R&D and ROI
Participate in customer engagements assessing quality and risks.
Key Challenges:
This role requires close collaboration across global teams for resolving SoC Verification methodology alignment, the leadership role needs to be strongly integrated locally as well as globally in order to make the right trade-offs in methodology and project execution.
This role with have direct impact on product execution for business lines, responsible for schedule, cost and quality commitments in SoC verification as well as identifying key improvements and ROI across the entire development process.
Qualifications
Degree in Electrical Engineering or Computer Science, with 15+ years of experience on IP/Sub-System Verification. Master’s or PhD degree in the area of computer or electrical engineering from a reputed university will be an added advantage
Candidate should be an experienced manager with a history of leading successful SoC RTL and Verification teams.
Proven experience in testbench design and development using UVM methodology for IP/Subsystem and SOC.
Experience in Microcontroller and Microprocessor architecture, Interconnect, Cache Coherency.
Experience in protocols like AHB/AXI/CHI, Memory (ROM, RAM, Flash, LPDDR/DDR3/4) and memory controllers.
Advanced knowledge of Verilog, System Verilog, C/C++, Shell.
Good knowledge in scripting like Perl, TCL or Python is a plus.
High proficiency in Metric Driven Verification concepts, functional and code coverage.
Expertise in directed and constrained random methodologies.
Good knowledge of formal verification methodologies and assertions.
Experience with debugging of designs pre- and post-silicon, in simulation and on the bench.
Excellent written and verbal communication skill.
Experience with System Verilog and front-end tooling (simulation, waveform viewers, lint, CDC, RDC, etc.) is required, as well as highly efficient FE methodologies.
Must have worked on complex, multi-core SoC’s with extensive interconnects and a large range of peripherals.
Strong domain knowledge of clocking, system modes, power management, debug, security and other architectures is a must.
Any of following experience would be a plus: High Speed Peripherals like DDR, PCIe, Ethernet, GPU, VPU (Video Processing Unit); NIC/FlexNOC interconnect; Flash memory subsystems.
Must have strong track record of managing RTL design through several successful tapeouts .

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