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Senior Principal FPGA RTL Design Engineer
2 months ago
Role DescriptionThis is a full-time on-site role for a Senior Staff FPGA RTL Design Engineer. The Senior FPGA RTL Design Engineer will be responsible for performing digital signal processing, debugging issues, and designing RTL for complex projects. The engineer will collaborate with cross-functional teams to develop and execute FPGA-based solutions.
QualificationsExpertise in Digital Signal Processing, Signal Processing, and RTL Design15+ years experience design Verilog code/ implementing and successfully testing the IP in hardwareStrong debugging skills and experience in analyzing and resolving issuesBachelor's or Master's degree in Electrical Engineering or a related fieldExperience with FPGA development tools and methodologiesKnowledge of industry standards and protocols such as PCIe, UFS, I3C, SPMI, RFFEAbility to work effectively in a team environmentExcellent problem-solving and communication skillsExperience in the semiconductor industry is a plusMust have hands-on experience with FPGA debugging tools and test & measurement instruments such as oscilloscope and Logic Analyzer.
Contact:UdayMulya "Mining The Knowledge Community"
