Senior Engineer

20 hours ago

Gurugram, India Nexifyr Full time

Senior Engineer — HPC (Semiconductor)
Location: Remote

Employment Type: Full-time

Role Summary

We are looking for an experienced HPC Engineer with a strong background in semiconductor design environments . The role involves integrating and optimizing EDA toolchains (Synopsys, Cadence, Mentor Graphics) and OPC flows on cloud and on-prem HPC clusters. You will be responsible for designing, running, and tuning large-scale chip design workloads to achieve maximum performance, scalability, and cost efficiency.

Key Responsibilities
  • Integrate and validate EDA tools (Synopsys, Cadence, Mentor Graphics) and OPC pipelines on HPC clusters or cloud environments.
  • Design and implement job scheduling and resource allocation policies for large-scale EDA workloads (Slurm, PBS, Kubernetes batch systems).
  • Optimize runtime performance (CPU, GPU, storage, network) for compute-intensive semiconductor design workflows.
  • Containerize and automate EDA environments for reproducibility (Docker, Kubernetes).
  • Monitor, troubleshoot, and tune multi-node workloads (MPI, distributed builds).
  • Collaborate with design and infra teams to improve throughput, reliability, and cost management.
  • Create documentation, runbooks, and onboarding guides for engineers using the HPC environment.
Required Skills & Experience
  • 5+ years of experience in HPC / cloud platform engineering or EDA infrastructure support .
  • Hands-on experience with Synopsys, Cadence, and/or Mentor Graphics tools in production environments.
  • Knowledge of OPC flows and their role in semiconductor design.
  • Strong Linux systems administration skills (RHEL/Ubuntu) and scripting (Bash, Python).
  • Familiarity with HPC schedulers (Slurm, PBS, Grid Engine, or Kubernetes batch).
  • Experience with cloud providers (AWS, Azure, GCP) and instance/storage optimization for HPC.
  • Knowledge of storage and I/O tuning for high-performance workloads.
Nice-to-Have
  • Experience with license servers (FlexLM, RLM) for EDA tools.
  • Exposure to FPGA or GPU-accelerated workloads.
  • Familiarity with CI/CD pipelines for EDA environments.
  • Background in semiconductor companies or design service providers.
Education
  • Bachelor's / Master's degree in Computer Science, Electronics, or related field — or equivalent industry experience.

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