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Lead DFT Engineer
2 weeks ago
"Time to think positive, do positive and keep on moving in your life" - Engineering The Change with LTTS .
Hence, I am glad to share an opportunity with you if you are looking for a job change
Kindly share this post to the maximum, so that it can reach to the maximum relevant resources.
I am in search of Lead DFT Engineers, who is having experience of 5 to 12 years working as a DFT Engineer. Please refer to the below job description and share your updated resume with below details to If your profile is a right fit for the position, I will shortly get in touch with you:
Current CTC:
Expected CTC:
Notice Period:
Total relevant Experience:
JD:
• Strong knowledge and experience in Scan Insertion, TestKompression, ATPG, Memory BIST and JTAG at IC –level for mixed signal designs.
• Experience in using Mentor DfT tools, Cadence RC and simulator tools
• Define DfT Strategy and Requirement Specification for the design
• DfT verification for gate-level and timing simulations
• Work cross sites with design team to define and implement DfT.
• Hands on experience in solving DfT problems, simulation failures, ATPG coverage and DRC improvements.
• Work with STA engineer to define timing constraints for DfT modes
• Support Test engineer in silicon debug and pattern delivery for ATE
• Experience in RTL coding, shell scripting
• Experienced in handling analog DfT simulations
• Be fluent with all common concepts of DfT and DfT tools
Best Wishes
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