Technical Lead – Chip Design Front End

2 weeks ago

bangalore, India Mulya Technologies Full time

Technical Lead – Chip Design Front End

Fortune 500 Organization

Location: Bangalore


Job Title : Technical Lead – Chip Design Front End

Job Overview: As a Frontend Technical Lead specializing in Semiconductor Chip Design, you will lead and coordinate the execution of the front-end stages of integrated circuit development. This role requires a strong technical background in digital design, verification, synthesis, power management, DFT, and exceptional project management skills. Additionally, you will oversee product support activities for both Pre-production and Post-production stages, ensuring the successful initiation, development, and sustainment of semiconductor designs.


Key Responsibilities:

  • Project Planning and Execution: Develop and maintain project plans, timelines, and milestones for front-end design phases of chip design. Coordinate with engineering teams to ensure project goals are clearly defined and aligned with overall business objectives. Monitor and manage project progress, identifying potential risks and implementing mitigation strategies.
  • Verification Planning and Management: Develop a robust verification strategy and plan for the digital design, ensuring comprehensive coverage of functional and performance requirements. Manage the execution of verification plans, including the creation and execution of effective testbenches and methodologies. Oversee the development and implementation of verification environments, ensuring thorough and efficient verification of digital designs.
  • Stakeholder Communication: Communicate project status, risks, and milestones to internal and external stakeholders.
  • Documentation: Maintain accurate and up-to-date project documentation, including design specifications, test plans, and progress reports. Ensure compliance with industry standards and regulations.
  • Continuous Improvement: Identify opportunities for process improvement and efficiency gains in the chip design workflow. Stay informed about industry trends and emerging technologies.
  • RTL Design and DFT Integration : Oversee the development and optimization of Register Transfer Level (RTL) code using hardware description languages (HDLs) such as Verilog or VHDL. Integrate Design for Testability (DFT) techniques into the RTL design phase, ensuring efficient test coverage for manufacturing testability. Collaborate with DFT engineers to implement scan chains, built-in self-test (BIST), and other DFT structures in the RTL code.
  • RTL Manipulation for DFT : Lead RTL manipulation efforts to enhance DFT capabilities, ensuring observability and controllability of internal signals for testing. Implement DFT-friendly coding practices and RTL modifications to improve testability and reduce manufacturing test costs.
  • RTL Coding Guidelines and Code Review : Enforce adherence to industry-standard RTL coding guidelines for consistency and maintainability. Conduct and participate in code reviews to ensure high-quality RTL code.
  • Digital Verification: Oversee functional verification methodologies, including SystemVerilog and Universal Verification Methodology (UVM). Ensure the creation and execution of effective testbenches for verifying the correctness of digital designs. Perform gate-level netlist verification to validate the integrity of the design at the gate level, ensuring consistency between the RTL description and the synthesized netlist. Conduct Multi-Voltage Domain verification using UPF, ensuring proper functionality and power management across different voltage domains in the system-level design.
  • Power Estimation and Optimization : Utilize PrimePower for accurate power estimation at different stages of the design.
  • Develop and implement strategies for reducing power dissipation, considering techniques such as clock gating, power gating, and voltage scaling. Collaborate with teams to achieve power reduction goals without compromising functionality.
  • Clock Domain Crossing (CDC): Oversee the identification and resolution of CDC issues to ensure proper synchronization between different clock domains.
  • EDA Tools for Front End: Ensure proficiency in using Electronic Design Automation (EDA) tools specific to front-end chip design stages.
  • Product Support for Pre-production : Create test patterns from system-level simulations to ensure comprehensive testing coverage in the Pre-production phase. Collaborate with system architects and designers to validate system-level functionality and address any issues before moving to production. Facilitate the smooth transition of designs from the development phase to the manufacturing phase.
  • Product Support for Post-production: Address customer concerns and troubleshoot issues related to the semiconductor products post-production. Conduct customer-requested simulations to validate specific functionalities and address customer-specific requirements. Perform return failure analysis to identify root causes of issues reported by customers and collaborate with cross-functional teams to implement corrective actions.

Qualifications:

  • in VLSI design from reputed universities like IIT/NIT with background in Bachelors in Electronics and Communication, or a related field.
  • years of experience in the field of semiconductor chip design.
  • experience in project management, with a focus on the front-end stages of semiconductor chip design.
  • technical background in digital design, verification, and synthesis.
  • leadership and communication skills.
  • with project management tools and methodologies.


Preferred Skills:

  • Management Professional (PMP) certification is a plus.
  • with Electronic Design Automation (EDA) tools specific to front-end design.
  • of industry standards and best practices in semiconductor front-end design.
  • with Agile methodologies.





Contact:

Uday

Mulya Technologies

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