Lead STA

Skills RequiredNetlist and constraint sign in checks and validation.Prime time constraint development at full chip level and clean up.Multimode multi corner timing knowledge and timing closure at sub HM/block/top level.Top level timing closure with sign off STA in MMMC with Xtalk and OCV. Top level ECO implementation strategy development for netlist, RTL and...

Skills Required- Netlist and constraint sign in checks and validation.- Prime time constraint development at full chip level and clean up.- Multimode multi corner timing knowledge and timing closure at sub HM/block/top level.- Top level timing closure with sign off STA in MMMC with Xtalk and OCV. Top level ECO implementation strategy development for netlist,...

Skills Required- Netlist and constraint sign in checks and validation.- Prime time constraint development at full chip level and clean up.- Multimode multi corner timing knowledge and timing closure at sub HM/block/top level.- Top level timing closure with sign off STA in MMMC with Xtalk and OCV. Top level ECO implementation strategy development for netlist,...

Skills RequiredNetlist and constraint sign in checks and validation.Prime time constraint development at full chip level and clean up.Multimode multi corner timing knowledge and timing closure at sub HM/block/top level.Top level timing closure with sign off STA in MMMC with Xtalk and OCV. Top level ECO implementation strategy development for netlist, RTL and...

Skills RequiredNetlist and constraint sign in checks and validation.Prime time constraint development at full chip level and clean up.Multimode multi corner timing knowledge and timing closure at sub HM/block/top level.Top level timing closure with sign off STA in MMMC with Xtalk and OCV. Top level ECO implementation strategy development for netlist, RTL and...

Skills Required Netlist and constraint sign in checks and validation. Prime time constraint development at full chip level and clean up. Multimode multi corner timing knowledge and timing closure at sub HM/block/top level. Top level timing closure with sign off STA in MMMC with Xtalk and OCV. Top level ECO implementation strategy development for netlist,...

Skills RequiredNetlist and constraint sign in checks and validation.Prime time constraint development at full chip level and clean up.Multimode multi corner timing knowledge and timing closure at sub HM/block/top level.Top level timing closure with sign off STA in MMMC with Xtalk and OCV. Top level ECO implementation strategy development for netlist, RTL and...

We’re Hiring: STA Engineer | 5–10 Years Experience | Bangalore & HyderabadCompany: ACL Digital CompanyLocation: Bangalore & HyderabadExperience: 5 to 15 YearsJob Type: Full-TimeACL Digital is looking for Senior Static Timing Analysis (STA) Engineers with solid experience in timing closure of advanced SoC designs.If you’re an STA expert who...

We’re Hiring: STA Engineer | 5–10 Years Experience | Bangalore & HyderabadCompany: ACL Digital CompanyLocation: Bangalore & HyderabadExperience: 5 to 15 YearsJob Type: Full-TimeACL Digital is looking for Senior Static Timing Analysis (STA) Engineers with solid experience in timing closure of advanced SoC designs.If you’re an STA expert who...

Job OpportunityWe are seeking a highly skilled Senior STA Specialist to lead our static timing analysis team. The ideal candidate will have expertise in developing and implementing STA methodologies and tools to ensure timely delivery of complex IC designs.Leverage your knowledge of prime-time constraint development to drive full-chip level optimization and...