
Design and development engineer
17 hours ago
Job Title: Sensor Design & Development Engineer Qualification: B. E /M. E in Electronics / Electricals / Mechatronics Experience: 4 to 8 Years Location: Bangalore Responsibility: Design, development, testing and validation of different kind of sensors required in automotive applications. Simulation of sensors and electronic circuits using simulation tools. Conduct rigorous testing and validation of sensor designs and prototypes to ensure they meet performance specifications and safety standards. Prepare 2 D drawings including design requirements using UG NX, Auto CAD for electronic parts used on vehicle. Prepare 3 D models including for electronic parts used on vehicle. Fault finding in electronic circuit. Study and testing of benchmarking parts. Maintain detailed technical documentation, including design specifications, test reports, and validation data. DFMEA & Root cause analysis for quality issues. Competencies: Strong understanding of automotive sensor technologies like Hall, AMR, GMR, TMR, accelerometers, gyroscopes, pressure sensors, temperature sensors, and cameras. Experience with sensor design, testing and validation methodologies Knowledge of working and application of electronic components like SCR/MOSFET/IGBT/Op-Amp etc. Proficiency in relevant software tools, such as CAD software, simulation software, and test equipment. Exposure to Sensor/electronics manufacturing and validations facilities, testing/ test set-up experience Ability to work on electronic circuit simulation tools Familiarity with vehicle architecture, Flashing & CAN technology. Expertise: Knowledge of Sensor design, development, testing and manufacturing methodologies. Product Lifecycle Management tool (E.g. Teamcenter) CAD , UG NX or equivalent Basic knowledge of CAN communication.
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Verification Lead Design Engineer
5 days ago
bangalore, India Cadence System Design and Analysis Full timeBE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer.5+ years of Design Verification experience with SV/UVMStrong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must.Design Verification experience verifying complex designs and...
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Rtl release principal design engineer
17 hours ago
Bangalore, India Cadence System Design And Analysis Full timeCollege education in Electronics Engineering or Computer Engineering Exp- 7-12 Yrs - Working knowledge in RTL design flow steps like RTL coding, Simulation, compilation/testbench validation, Synthesis, Timing, DFT,lint, CDC, LEC etc. - Ability to debug existing Verilog/System verilog test cases with little or no help from the designer. - Functional...
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Sr RTL Principal Design Engineer
5 days ago
bangalore, India Cadence System Design and Analysis Full timeRTL Design Engineer for Interface Controller IP development team.Position is based in Bangalore or Noida.The role would include design and support of the RTL of the PCIe/CXL/IDE/UALink IP solution of Cadence.The work involved will be working with the existing RTL, addition of new features into the RTL, ensuring various customer configurations are clean as...
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RTL Release Principal Design Engineer
5 days ago
bangalore, India Cadence System Design and Analysis Full timeCollege education in Electronics Engineering or Computer EngineeringExp- 7-12 Yrs- Working knowledge in RTL design flow steps like RTL coding, Simulation, compilation/testbench validation, Synthesis, Timing, DFT,lint, CDC, LEC etc.- Ability to debug existing Verilog/System verilog test cases with little or no help from the designer.- Functional simulation...
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Sr Principal RTL Design Engineer
6 days ago
Bangalore, India Cadence System Design and Analysis Full timeCollege education in Electronics Engineering or Computer Engineering Exp- 7-15 Yrs - Working knowledge in RTL design flow steps like RTL coding, Simulation, compilation/testbench validation, Synthesis, Timing, DFT,lint, CDC, LEC etc. - Ability to debug existing Verilog/System verilog test cases with little or no help from the designer. - Functional...
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RTL Release Principal Design Engineer
6 days ago
Bangalore, India Cadence System Design and Analysis Full timeCollege education in Electronics Engineering or Computer Engineering Exp- 7-12 Yrs - Working knowledge in RTL design flow steps like RTL coding, Simulation, compilation/testbench validation, Synthesis, Timing, DFT,lint, CDC, LEC etc. - Ability to debug existing Verilog/System verilog test cases with little or no help from the designer. - Functional...
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Sr Principal PD Design Engineer
1 day ago
bangalore, India Cadence System Design and Analysis Full timeThis is a full-time on-site role for a Sr Principal Physical Design Engineer based in Bengaluru. The engineer will be responsible for overseeing and contributing to the physical design process of complex IPs, especially Memory IPs with higher frequencies on latest Tech. nodes. Day-to-day tasks include floorplanning, placement, clock tree synthesis, routing,...
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Senior Physical Design Engineer
1 day ago
bangalore, India Eximietas Design Full timeHi All,Eximietas Hiring Senior Physical Design Leads/Managers.Experience: 10+ Years.Location: Bengaluru or Visakhapatnam.About the jobQualification Required:Typically requires a minimum of 10+ years of experience in Physical Design with mainstream P&R toolsBachelors OR Masters Degree Engineering in Electronics or Electrical or Telecom or VLSI...
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Principal Verification Design Engineer
6 days ago
Bangalore, India Cadence System Design and Analysis Full timeJob Description Design and lead high speed IP (USB3, PCIE, DPHY etc) development. Need to be a strong individual contributor in analog domain. Will be required to participate in all aspects of development – analog design, layout, digital design, documentation and silicon validation. Would be required to participate in customer facing discussions. ...
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Sr verification principal design engineer
17 hours ago
Bangalore, India Cadence System Design And Analysis Full time12-14 yrs of work experiences in VLSI domain with Master’s/bachelor’s degree in engineering Strong expertise in Verilog, HVL(SV, Specman e) with UVM/OVM/e RM methodology Expertise in assertions development/closure, constraint randomization, functional and code coverages, formal verification Expertise in test-bench development Strong RTL and GLS (w/ or...