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Asic Digital Design Engineer
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Job Description:Work on Formal (and Functional Verification) of High speed serial link PHY IPs for USBx, PCIex, Ethernet, Display & HDMI protocol standards, specific experience of Formal property verificationIP/design blocks/Firmware Specification study and build/update verification plans as well as the test casesBuild/update Formal verification environments to execute the test plans, support team members with Formal methodologyTo create setups for formal verification for other IPs, add value with Formal Verification RequirementsB.Tech/M.Tech with 5+ years of relevant experienceUnderstanding of Formal and functional verification flow with experience on industry standard development and verification tools and methodologies VMM, OVM/UVM and System VerilogExperience with System Verilog Assertions, code and functional coverage implementation and reviewScripting and automation using TCL/PERL/PythonExcellent debug and diagnostic skillsOur Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of digital, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.
At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you too have passion for innovation, we want to meet you.
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.