RTL Design
2 months ago
We are currently seeking experienced RTL Engineers
- Minimum 4 years of experience required
- Proficiency in RTL development from micro-architecture
- Expertise in SoC, Memory, Peripheral, Security, and Cache IP’s Analysis & Integration
- Skilled in RTL Quality checks including VCS, synthesis checks, LINT, LEC, CDC
- Strong background in Failures Debug/Bug fixes on RTL and Netlist
- Experience in low-level design document generation, implementation & review
- Knowledge of ARM Cortex based system understanding & Integration
Join our dynamic team to collaborate on cutting-edge projects and contribute to innovative solutions in semiconductor design
Interested candidates, please share your resume with suman.ragothama@bitsilica.com
-
High-Speed Interface PHY IP Digital Design
1 month ago
Ghaziabad, India ConnectPRO Full timeFront-End implementation of SERDES high speed Interface PHY designsRTL development and its validation for linting, clock-domain crossing, conformal low power and DFT rules.Work with functional verification team on test-plan development and debug.Develop timing constraints, deliver synthesized netlist to physical design team, and provide constraints support...
-
Principal Digital Verification Engineer
6 days ago
Ghaziabad, India Mulya Technologies Full timePrincipal Digital Verification EngineerBangalore / HyderabadAbout Omni Design TechnologiesOmni Design Technologies is a leading provider of high-performance, ultra-low power IP cores, from 28nm down through advanced FinFET nodes, which enable differentiated system-on-chip (SoC), in applications ranging from 5G, wireline and optical communications, LiDAR,...