Senior Validation Engineer

14 hours ago

New Delhi, India L&T Semiconductor Technologies Full time

Senior Validation Engineer Experience : 7 - 15 yrs JD Knowledge of one or more Protocols: PCIe, LPDDR, SPI, USB, AXI, Lin CAN , ETHERNET, MMI DSI/CSI Knowledge of ARM and/or x86 SoC Architecture with internal understanding of complete BOOT Process. Strong experience in C programming language and Assembly Language. Free-RTOS experience Networking / Wifi stack in Linux and/or networking stack in FreeRTOS Strong experience in one or more scripting languages – Perl/ Python/ TCL etc. Debugging experience at register level . Debugger interface knowledge (Coresight/ UltraSoC, Lauterbach, JTAG) Experience on any emulation platforms (Palladium, Zebu or equivalent) Experience in testing embedded software on SoC with Linux, or RTOS including understanding of HW architecture, board schematics, protocols & standards. Working proficiency with industry standards Instruments like Oscilloscope / LA , Spectrum analyserGood to have Skills Experience in coding / development in C++ Experience of Palladium compilation/ build flows is a big plus Linux Device Driver Knowledge/ TestingResponsibilities Pre & Post Silicon Validation / Emulation responsible for test plan development, test scenario creation and validation of IPs/ SoCs on emulation platform Triage, analyse and send comprehensive test results for nightly/ weekly/ Stability test Automate tests using existing test frameworks and work closely with Test Leads to improve test framework robustness and efficiency

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