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Senior DFT Engineer
1 week ago
DFT engineer.
Location : Blr/Kochi/ Vizag / Ahmedabad
Exp. – 4+ to 12Yrs
BE with minimum of 4-12years/ME with minimum of 4 years of experience in DFT/ATPG/BIST.
Define DFT (Scan, BSCAN and MBIST) methodology, architecture, and implementation strategies for Graphics.
Hands-on experience on DFT/MBIST insertion in complex and high performance cores.
Hands-on experience on ATPG, pattern simulation and coverage analysis
Work in close collaboration with SOC teams to implement DFT required features.
Define scan insertion and test mode STA constraints.
Work on Safety complaint DFT for Auto products.
Define DFD implementation for High performance GPU core.
Required skills
Experience coding Verilog RTL, TCL, and/or Perl
Core DFT skills - Scan compression and insertion, Memory BIST, JTAG/IJTAG, At-speed test, ATPG, back-annotated gate-level verification, silicon debug Experience with Siemens (Mentor), Cadence, and/or Synopsys DFT and simulation tools
Please share your profile or refer your friends to jhansi.bv@techmahindra.com for further discussion.
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