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Senior Manager, DEG Design
3 months ago
Top 10 Semiconductor Organization in the world
Location: Hyderabad
Senior Manager, DEG Design
As a Memory Design Engineer in our DRAM and Emerging memory Group at , you will be responsible for designing and analyzing digital and analog circuits used in the development of memory products. This includes simulating, optimizing and floor planning DRAM circuits. In this position, you will collaborate with various design and verification teams all over the world and support the efforts of groups such as Product Engineering, Test, Probe, Process Integration, Assembly and Marketing to proactively design products that optimize all manufacturing functions and assure the best cost, quality, reliability, time-to-market, and customer satisfaction.
Responsibilities Will Include, But Are Not Limited To
Contributing to the development of new DRAM and Emerging memory product opportunities by assisting with the overall design, layout, and optimization of Memory/Logic/Analog circuits Parasitic modeling and assisting in design validation, reticle experiments and required tape-out revisions Overseeing and managing the layout process including floor-planning, placement, and routing Performing verification processes with modeling and simulation using industry standard simulators Maintaining technical expertise and provide training Contributing to cross group communication to work towards standardization and group success Working with Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering groups to ensure proper manufacturability of product Proactively solicit input from Standards, CAD, modeling, and verification groups to ensure the design quality Driving innovation into the future Memory generations within a dynamic work environment
Successful Candidates For This Position Will Have
Extensive knowledge of CMOS Circuit Design and Device Physics Knowledge
and experience in Finesim and/or Hspice Experience with power network analysis
Extensive knowledge in verilog modeling and simulation tools Extensive knowledge of state machine logic/design verification techniques
Excellent problem-solving and analytical skills A self-motivated, enthusiastic team player who enjoys working with others Good communication skills with the ability to convey complex technical concepts to other design and verification peers in verbal and written form
Experience with a scripting language (Python, Tcl, Perl, etc) Familiarity with memory design is a big plus
Qualifications
Bachelors or Post Graduate Degree with 15+ years experience in Electronics Engineering or related engineering field
Contact:
Uday
Mulya Technologies
muday_bhaskar@yahoo.com
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