CPU Architecture and Logic design Lead

4 weeks ago

Pushkar, Rajasthan, India Mulya Technologies Full time

Processor Architecture and Logic design Lead

Fortune 100 Organization

Location: Bangalore

As a Hardware at , you'll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable customers to make better decisions quicker on the most trusted hardware platform in today's market.

Your Role And Responsibilities

As a Logic design lead in the Systems division, you will be responsible for the micro architecture, design and development of a high-bandwidth, low-latency on-chip interconnect (NoC) and chip-to-chip interconnect and integration into high-performance Systems.

  • Design and architect different interconnect topologies as driven by bandwidth, latency and RAS requirements
  • Develop the features, present the proposed architecture in the High level design discussion
  • Develop micro-architecture, Design RTL, Collaborate with the Verification, DFT, Physical design, FW, SW teams to develop the feature
  • Signoff the Pre-silicon Design that meets all the functional, area and timing goals
  • Participate in silicon bring-up and validation of the hardware

Preferred Education

Master's Degree

Required Technical And Professional Expertise

8+ years of relevant experience

  • At least 1 generation of processor interconnect design delivery leadership (eg UPI, axi, amba, NoC).
  • Expertise of SMP coherency
  • Experience in different on-chip interconnect topologies (e.g., mesh, crossbar)
  • Understanding of various snoop and data network protocols
  • Understanding of latency & bandwidth requirements and effective means of implementation
  • Working knowledge of queuing theory
  • numa/nuca architecture
  • Proficient in HDLs- VHDL / Verilog
  • Experience in High speed and Power efficient logic design
  • Experience in working with verification, validation, physical design teams for design closure including test plan reviews and verification coverage
  • Good understanding of Physical Design and able to collaborate with physical design team for floor planning, wire layer usage and budgets, placement of blocks for achieving high-performance design
  • Experience in leading uarch, RTL design teams for feature enhancements.

Contact

Uday

Mulya Technologies

muday_bhaskar@yahoo.com

https://mulyatech.com/

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