Lead RTL Design Engineer
1 day ago
Purpose:LTSCT’s Chief Development Organization and Global Engineering team is a central engineering organization responsible for developing and delivering Systems-on-a-Chip (SoCs) for LTSCT's Automotive, Industrial, Energy and Telecom infra business lines. The team is challenged to produce industry-leading solutions covering very cost-sensitive, low power devices to highly integrated, high performance, multi-domain devices compliant with the latest automotive and industrial safety and security standards.Areas of Responsibilities:- Contribute to the RTL delivery for a multitude of projects. - Work closely with system architects to define high level specifications that are implementable and robust, and Interface with verification/validation teams to ensure design quality and robustness. - Build strong collaboration with other R&D teams such as Verification, digital IP, Design Enablement, Emulation, and Validation to achieve project milestones. - Promote continuous improvement to design techniques to ensure ‘Zero Defect’ chips. - Collaborate with SME’s and key leaders in architecture, systems, emulation, SoC design, software, physical design, and IP teams developing key technical networks to influence.Qualifications:- At least 10+years of experience in related domains and have working knowledge. - Degree in Electrical Engineering or Computer Science, with 7+ years of experience on IP/Sub-System RTL Design. - Experience in testbench design and development using UVM methodology for IP/Subsystem and SOC. - Experience in Microcontroller and Microprocessor architecture, Interconnect, Cache Coherency. - Experience in protocols like AHB/AXI/CHI, Memory (ROM, RAM, Flash, LPDDR/DDR3/4) and memory controllers. - Experience and knowledge of Verilog, System Verilog, C/C++, Shell. - Good knowledge in scripting like Perl, TCL or Python is a plus. - Proficiency in Metric Driven Verification concepts, functional and code coverage. - Expertise in directed and constrained random methodologies. - Good knowledge of formal verification methodologies and assertions. - Experience with debugging of designs pre- and post-silicon, in simulation and on the bench. - Excellent written and verbal communication skills. - Experience with System Verilog and front-end tooling (simulation, waveform viewers, lint, CDC, RDC, etc.) is required, as well as highly efficient FE methodologies. - Strong domain knowledge of clocking, system modes, power management, debug, security and other architectures is a must. - Any of following experience would be a plus: High Speed Peripherals like DDR, PCIe, Ethernet, GPU, VPU (Video Processing Unit); NIC/FlexNOC interconnect; Flash memory subsystems
-
ASIC SOC RTL Design Lead
3 days ago
New Delhi, India Eximietas Design Full timeHi All,Greetings' from Eximietas Design....!We are Hiring ASIC SOC RTL Design Engineer/Leads.Job Title: ASIC SOC RTL Design Engineer/Leads..!Experience: 8+ Years.Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA.Anyone with a Valid H1B or Already in US.Job Description:Eximietas Design is seeking an experienced and highly skilled ASIC...
-
Lead RTL Design Engineer
4 weeks ago
New Delhi, India ACL Digital Full timeLead RTL Design EngineersExperience Level:10+ years of RTL design and developmentJob Description: Silicon Design EngineerLocation: Hyderabad and BangaloreBasic Job Deliverable: Silicon Design Engineer (RTL Design and Development)o Responsible for RTL design and developmento Responsible for generating documents, such as requirements specification, design,...
-
Lead RTL Design Engineer
2 weeks ago
New Delhi, India ACL Digital Full timeLead RTL Design Engineer (ASIC) Location: Chennai, Tamil Nadu Experience: 6 to 9 YearsJob Description6 to 9 Years of experience in Synthesis, Constraints and interface timing Challenges. Good knowledge of Power is preferable.Strong Domain Knowledge on RTL Design, implementation, and Timing analysis. Experience with RTL coding using Verilog/VHDL/System...
-
Lead RTL Design Engineer
5 days ago
New Delhi, India ACL Digital Full timeLead RTL Design Engineer (ASIC)Location: Chennai, Tamil NaduExperience: 6 to 9 YearsJob Description6 to 9 Years of experience in Synthesis, Constraints and interface timing Challenges. Good knowledge of Power is preferable.- Strong Domain Knowledge on RTL Design, implementation, and Timing analysis. - Experience with RTL coding using Verilog/VHDL/System...
-
RTL Design Lead
2 days ago
Delhi, India Proxelera Full timeWe’re looking for an experienced RTL Design Lead with strong leadership in front-end SoC design, from architecture to handoff. The ideal candidate will drive RTL design, integration, and synthesis, ensuring power, performance, and area efficiency while mentoring engineering teams.Key Responsibilities & Skills:* Lead RTL design from architecture definition...
-
SoC RTL Design Lead
1 week ago
New Delhi, India Texas Instruments Full timeWe are looking for an experienced Senior RTL Design Lead to join our team in developing cutting-edge control solutions and Application specific SoC products. The ideal candidate will have deep understanding of RTL design and SoC integration, particularly in the context of ARM-based architectures, and a proven ability to collaborate across multiple...
-
Senior Lead RTL Design
4 weeks ago
New Delhi, India L&T Technology Services Full timeRTL Design Engineer with 8+ years of Hands on experiences.• Experience/proficiency in RTL design(Verilog/VHDL) architecture implementation using (coding in) hardware description (RTL) , IP Design, SoC Design and Integration• Should have hands on experience in all the Design aspects, should work independently.• Experience/proficiency in front-end...
-
SoC RTL Design Lead
2 weeks ago
New Delhi, India Texas Instruments Full timeWe are looking for an experiencedSenior RTL Design Leadto join our team in developing cutting-edge control solutions and Application specific SoC products. The ideal candidate will have deep understanding of RTL design and SoC integration, particularly in the context of ARM-based architectures, and a proven ability to collaborate across multiple engineering...
-
Lead/Senior RTL Design
3 weeks ago
New Delhi, India Capgemini Engineering Full timeRole: Lead RTL Design Engineer Experience: 7 to 13 Years Location: BengaluruJob Description: Should be good in Integration of SOC & RTL coding. Should be aware of soC flow like Spyglass-Lint/Synthesis (DC)/CDC. Should be aware of scripting language. Candidate should have experience on SOC Integration, SpyGlass Lint, CDC, DC-Synthesis & VCLSP. Should have...
-
RTL Design Engineer
4 weeks ago
New Delhi, India ACL Digital Full timeJob Title: RTL Design Engineers Exp Level: 5+ yrs Loctaion: Hyderabad/BangaloreJob Description: • RTL coding knowledge • Top-level (SOC) level basic industry standard Arch knowledge • SoC & IP level Integration knowledge • IPXACT knowledge • IORING and Phys & GPIOs basic functionality • Design Partitioning(Tilification) knowledge • Design RTL...