Incise Infotech

4 weeks ago

Bengaluru, India Incise Infotech Limited Full time

Job Title : DFT Engineer

Location : Bangalore

Experience : 3- 5 Years

Availability : Immediate Joiners Preferred

About the Role :

We are seeking a Design for Test (DFT) Engineer with 3- 5 years of experience in implementing advanced test methodologies in ASIC design. The ideal candidate will be involved in all aspects of DFT implementation and validation, ensuring high test coverage and production readiness.

Key Responsibilities :

- Develop and implement DFT architectures including scan insertion, boundary scan, MBIST, and JTAG.

- Perform ATPG (Automatic Test Pattern Generation) to achieve high fault coverage.

- Integrate DFT features into RTL and work closely with synthesis and backend teams.

- Conduct timing analysis and constraint management for DFT logic.

- Collaborate with design and verification teams to ensure DFT compliance and coverage.

- Support silicon bring-up and post-silicon validation for DFT features.

- Debug test failures, optimize test patterns, and support ATE (Automatic Test Equipment) test development.

Required Skill Set :

- Strong hands-on experience in Scan Insertion, ATPG, MBIST, and JTAG implementation.

- Proficient with DFT tools such as Tessent (Mentor), DFTMAX (Synopsys), Test Compiler.

- Strong scripting skills using TCL, Perl, and/or Python for automation.

- Solid understanding of RTL design, synthesis flow, STA (Static Timing Analysis).

- Familiarity with silicon bring-up and production test flows is a strong advantage.


- Knowledge of fault modeling, pattern generation, and debug techniques.

- Good communication and cross-functional collaboration skills.

Why Join Us?

- Work on cutting-edge DFT implementations with a high-performing team.

- Be part of a growing semiconductor design organization based in Bangalore.

- Opportunity to contribute to full-chip tape-outs and post-silicon success


(ref:hirist.tech)

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