DDR / PCIe / NVMe / UCIe - Verification Engineer

Senior Design Verification ExpertWe are seeking a highly skilled Senior Design Verification Engineer to join our team.Job Description:The successful candidate will be responsible for designing and verifying high-speed interfaces, such as DDR, PCIe, UCIe, and NVMe. This involves creating and implementing verification plans, developing test benches, and...

JD:This role requires expertise in PCIe, CPU, Ethernet, CXL, DDR, and RISC-V technologies.Key Responsibilities:Develop and execute verification plans for hardware designs incorporating PCIe, Ethernet, CXL, DDR, and RISC-V technologies.Design and implement verification environments using SystemVerilog and UVM methodologies.Develop test cases to validate...

We are looking for experiencedSenior/Lead ASIC Verification Engineersfor our Noida-VIP team. Does this sound like a good role for you?Experience : 5yrs to 15 years (multiple roles)Location:NoidaAssociated with Verification especially using industry-standard protocols & methodologyLanguages: Hands-on experience withSystem Verilog & Verilog . Should have a...

Job OpportunityThe position of Design Verification Engineer is a challenging opportunity for individuals with expertise in cutting-edge technologies. Key responsibilities include developing and executing verification plans for hardware designs, designing and implementing verification environments using SystemVerilog and UVM methodologies, and collaborating...

ACL Digital Hiring for the below requirement Designation: DV engineers Experience: 8-10+ years Location: Bangalore Job Description: 1. Hands-on experiences on SV/UVM/Specman 2. Familiarity with formal-based verification 3. Running regression and debugging failures independently 4. Experience in functional and code coverages 5. Independently handling...

Job Description DV Positions:Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-stem/SoC level verificationDevelop functional tests based on verification test planDrive Design Verification to closure based on defined verification metrics on test plan, functional and code coverageDebug, root-cause and resolve...

Job Title: Senior Verification ExpertThis is a lead role for experienced engineers to excel in design verification.Main Responsibilities:Develop and implement comprehensive verification environments using UVM methodology.Create and execute verification infrastructure, covering full design cycles.Verify CPU subsystems or SoCs using StemVerilog/UVM and/or...

-We are seeking a highly skilled and experienced Senior Design Verification Engineer to join our SoC/ASIC verification team in Bangalore. The ideal candidate will have a deep understanding of the verification lifecycle, from test planning to coverage closure, and be able to independently drive complex verification tasks for IP, subsystem, or full-chip level...

Design Verification Engineer Job DescriptionWe are seeking a seasoned Design Verification Engineer to play a vital role in ensuring the quality and reliability of our products. The successful candidate will have a strong background in formal-based verification, with hands-on experience in SV/UVM/Specman.Key Responsibilities:Familiarity with formal-based...

DDR Verification:Lead the verification of DDR memory controller and PHY designs, ensuring compliance with DDR standards such as DDR3, DDR4, DDR5, and other memory interface protocols.Testbench Development:Develop and implement scalable, reusable, and efficient verification environments and testbenches for DDR designs using SystemVerilog, UVM (Universal...