Engineering Lead
3 months ago
Must have skills:-
- VLSI, RTL, Verilog/System Verilog
- Good fundamentals of communication theory
- Good understanding of DSP for use in communication systems.
- Worked on modules like Automatic Gain Control (AGC) / Automatic Frequency correction (AFC) / Equalizer (either time domain or frequency domain) / Forward Error Correction schemes like Reed-Solomon Codes / Convolutional Encoding / Viterbi Decoding or any other similar modules
- Should have worked on actual systems in the lab to prove the system performance of the modem.
- Good RTL skills to write optimal code considering both power and area.
- Exposure to simulation tools like Matlab / Scilab and ability to translate Scilab / Matlab code to RTL
- Exposure to fixed point coding
- Should have worked on FPGA prototype systems
- Good written and oral communication skills needed
Good to have skills :
- Having worked on 2.4GHz systems like WLAN, Bluetooth.
- Exposure to Bluetooth Low Energy (BLE) is a big plus.
- Exposure to analog and RF concepts / modules like LNA, Mixer, VGA.
- Worked on communication systems and DSP having developed modem (modulator demodulator) design and implementation for wired or wireless systems.
- Exposure to customer interaction.
Responsibilities :
- Understand existing IP design and Bluetooth\15.4 specifications
- Digital design, Micro architecture and RTL coding in Verilog of modems supporting multiple technologies including Classic Bluetooth, Bluetooth Low energy and IEEE 802.15.4
- Digital-design, micro-architecture, ASIC Frontend Tools runs like Linting, Logic equivalence, Synthesis, CDC checks,
- Support customers with integration of modem with custom or 3rd party RF, Manage IP delivery to SOC teams.
- Work with customer ASIC design teams on timing closure and power optimization.
Domain : VLSI design
Key words : Modem, modulation, demodulation, DSP, Matlab, Scilab, RTL
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