RTL Architect

Hi folks,

Greeting from Tech Mahindra

We are hiring for RTL architect

Job Description:

• Senior RTL Design Architect / Lead – IP / SoC / ASIC Design
• Candidate is expected to Define & Develop High Level / Micro Architecture design specification for a given Design requirement
• Experience with design & development of IP Protocols based on Layered Bus Architecture, PHY Development & Memory Controllers are added advantage
• Should be able to lead and drive a team of trained engineers in the design development life cycle to support spec to tape-out defined by specific assignment
• Must have good working experience of collaborating with cross functional teams like Verification, Validation, Physical Design and DFT
• Extensive experience in designing and RTL coding using Verilog /System Verilog/VHDL and verifying design with module level testbench or with formal techniques
• Experience in signing off on RTL Design QC at Subsystem / SoC level ( U sing Llint / CDC / DFT / Equivalence checks)
• Experience in synthesis using Synopsys Design Compiler (DC) and developing timing constraints (SDC) and Timing analysis
• Experience in low power design methodologies and related power estimations, power measurements during implementation
• Experience in developing/understanding of ECOs
• Experience in writing Functional Documents / Specifications from scratch
• Responsible for providing technical inputs or guidance to improve and adhere to hardware development and quality processes necessary to ensure the design consistently meets the required functionality, re-usability, reliability, performance and power targets to meet expected design targets

Experience- 10+ years

Location- Bangalore

To Apply: Share your resume to SM00822649@techmahindra.com