RTL Design Engineer

4 weeks ago


Bengaluru, India Vhunt4U Full time

DESIRED PROFILE :

- Master's and/or Bachelor's degree in engineering (or equivalent) in EC/ EE/ CS with 3 or more years of experience in digital SoC development.

- Experiences in RTL design using Verilog / SystemVerilog / VHDL for CPU / control sub-systems (AXI / AHB / APB bus), digital signal processing blocks(FIR filter, FFT/IFFT, NCO)

- Experience of front-end tools (Verilog simulators, linters, clock-domain-crossing checkers)

- Experience in gate level simulation and LEC checking

- Good understanding on back-end design flow on logic synthesis, constraints, timing analysis, DFT

- Proven knowledge of SystemVerilog assertions, checkers, and other design verification techniques

- Knowledge of languages such as C/C++, Perl, Tcl and Python

- Good verbal and written communication and presentation skills

- Team player with ability to collaborate with cross-functional teams to resolve issues effectively

- RTL coding & simulation in Verilog / SystemVerilog / VHDL

- Design simulation & checking with Cadence front end tools: Xcelium, SimVision, Jasper RTL Apps

- Python, Perl scripting for verification automation and report generation

- MS Office tools: Excel, power point, Word doc, Visio

- Able to work effectively with incomplete or changing requirements

JOB DESCRIPTION :

- Participate in SoC specifications reviews and contribute to micro-architecture definitions

- Front end digital design and implementation - RTL coding, CDC, Lint, and synthesis

- Develop design constraints and coordinate to debug both functional and DFT test issues

- Supervise/mentor young engineers for task assignment and ensure productivity and quality

- Project coordination and status update

- Help to improve SoC design methodologies and verification quality

- Support IP/Design Verification/Firmware/Software System/Production teams to provide the necessary support for timely closure of assigned blocks design and implementation issues

(ref:hirist.tech)

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