
Analog Layout Engineer
3 weeks ago
Job Title : Analog Layout Engineer
Location : Required : 5+ Years
Job Summary :
We are looking for a skilled and experienced Analog Layout Engineer with a strong background in custom layout of analog and mixed-signal circuits. You will be responsible for block-level and top-level layout, working closely with circuit designers to ensure performance, reliability, and manufacturability of silicon.
Key Responsibilities :
- Execute full-custom layout of analog and mixed-signal blocks (e.g., Op-Amps, ADCs, DACs, PLLs, LDOs, Bandgaps).
- Perform transistor-level layout using tools like Virtuoso (Cadence).
- Work closely with circuit designers to understand schematics and layout requirements.
- Drive floorplanning, placement, routing, and matching with a focus on parasitic optimization and area efficiency.
- Conduct Layout Versus Schematic (LVS), Design Rule Check (DRC), Antenna, and Electromigration (EM/IR) checks.
- Handle layout integration at top level including planning, hierarchy management, and routing.
- Support design sign-off processes and deliver GDSII on schedule.
Required Skills :
- Proficiency in analog custom layout tools (e.g., Cadence Virtuoso, Calibre, Assura).
- Strong knowledge of analog layout techniques: matching, shielding, symmetry, parasitic reduction.
- Good understanding of semiconductor physics and layout impact on circuit performance.
- Hands-on experience with deep sub-micron CMOS technologies (e.g., 28nm, 16nm or below).
- Experience in floorplanning and top-level integration.
- Ability to interpret and resolve DRC/LVS/ERC issues independently.
Preferred Qualifications :
- B.E./B.Tech/M.E./M.Tech in Electronics, VLSI, or a related field.
- Experience in FinFET process technologies is a plus.
- Basic understanding of analog circuit functionality to support layout decisions.
- Strong communication and collaboration skills to work effectively in cross-functional teams.
(ref:hirist.tech)-
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