
Associate Staff Engineer
3 days ago
Job Description
The position involves design verification of next generation IP’s /SoC’s with emphasis on verifying and signing off performance and power along with functionality by developing the needed RNM models . This role will require the candidate to understand and work on all aspects of VLSI Verification cycle like Testbench architecture, Verification Planning, Testbench and Test development, Verification closure with best-in-class methodologies including simulation, GLS . Candidate will require close interactions with Design, SoC , Validation, Synthesis & PD teams for design convergence. Candidate must be able to take ownership of IP/Block/SS verification.
Responsibilities:
Minimum Qualifications:
10-15 years in Industry& Bachelor or Master’s degree in Electrical and/or Computer Engineering Proficient in at least one of the following languages: Verilog, SystemVerilog, VerilogAMS. Strong understanding of analog circuits, digital design processes, and top-level integration. Basic knowledge of PMIC and DC-DC converters. Excellent simulation debugging skills, with the ability to analyze waveforms and identify issues in schematics, models, or RTL. Proficient in Unix environment and shell scripting, with a basic understanding of Python.Preferred Qualifications:
Mentoring skills Exceptional problem-solving skills Good written and oral communication skillsBenefits & Perks :
Not only will you be joining a highly skilled and tight-knit team where every engineer makes a significant impact on the product; we also strive for good work/life balance and to make our environment welcoming and fun.
Equity Rewards (RSUs) Employee Stock Purchase Plan (ESPP) Insurance plans with Outpatient cover National Pension Scheme (NPS) Flexible work policy Childcare support-
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