Senior Design Verification Engineer
3 hours ago
HCL Tech Job Summary: We are seeking a highly accomplished Design Verification Engineer (DV) to join our elite team and lead the verification efforts for our most critical ASIC and SoC projects. This senior-level position demands a mastery of verification methodologies and the ability to drive the development and execution of comprehensive verification plans. You will be responsible for ensuring the functional integrity and quality of our next-generation integrated circuits through innovative verification strategies. Responsibilities: Lead and define the overall verification strategy for assigned projects, leveraging advanced methodologies (UVM, Formal Verification) Architect and design robust verification environments (testbenches) to achieve exceptional code coverage and functional verification goals Utilize industry-leading verification tools (simulators, formal verification tools) to conduct thorough verification and analysis Debug and troubleshoot complex verification failures, identifying root causes and collaborating with design engineers for efficient resolution Mentor and guide junior DV engineers, fostering a culture of excellence and knowledge sharing within the team Champion best practices for verification code quality and participate in code reviews Stay at the forefront of the verification landscape by actively researching and adopting emerging tools and methodologies Provide technical leadership and contribute to the overall verification roadmap for the team Qualifications: Master's degree in Electrical Engineering, Computer Engineering, or a related field (highly preferred) Minimum of 7+ years of experience in Design Verification for complex ASICs and SoCs Proven track record of successfully leading and executing verification projects In-depth knowledge of digital design principles, advanced verification methodologies (UVM, Formal Verification), and best practices Expertise in Verilog and VHDL with a strong grasp of coding styles and optimization techniques Extensive experience with a broad range of verification tools (simulators, formal verification tools, scripting languages) Excellent leadership, communication, collaboration, and problem-solving skills Ability to manage multiple projects, prioritize tasks, and meet aggressive deadlines Benefits: Competitive salary and benefits package commensurate with experience and expertise Opportunity to lead and influence the verification of cutting-edge technologies Dynamic and challenging work environment with opportunities for professional growth and leadership development Recognition and rewards for outstanding contributions
Regards, Dhivya dhivya.ramesh@hcltech.com
-
Senior Design Verification Engineer
2 weeks ago
india eInfochips (An Arrow Company) Full timePOSITION TITLE: Senior Engineer/Engineer – ASIC Design Verification LOCATION: Noida/ Bangalore/ Hyderabad/ Pune/ Chennai/ AhmedabadROLE & RESPONSIBILITIESAn expert level with developing UVM-based SV test-benches. Highly experienced with defining block, sub-system and SOC top level test plans. Relevant experience with one or more of PCIe, NVMe, NAND, DDR...
-
Senior Design Verification Engineers
2 hours ago
Bengaluru, India ACL Digital Full timeJob Description Senior Design Verification Engineer: - Should have PCIE IP level verification exposure - Good UVM understanding - Serial protocol understanding Interested,please drop your updated CV to [Confidential Information]
-
Verification Engineer
4 days ago
India Alpinum Consulting Full timeONLY WEBSITE APPLICATIONS WILL BE ACCEPTED🚀 We’re Hiring Verification Engineers (All Levels) | India, RemoteAlpinum is expanding its global engineering team and looking for talented Verification Engineers at junior, mid, and senior levels to join us in shaping the future of semiconductor design and verification.Whether you’re just starting your...
-
Senior Design Verification Engineers
2 weeks ago
india ACL Digital Full timeHi All,ACL Digital is looking for "Senior Design Verification Engineers"Exp Level: 4+ years Notice period: Immediate to 30 days Location: Bangalore and HyderabadJob Description: Must have good knowledge on the verification flows Excellent hands-on debug skills and problem solving attitude. Experience of working in complex test-bench/model in Verilog, System...
-
Design Verification Engineer
2 weeks ago
india ACL Digital Full timeDesign Verification Engineer - Senior / Lead / Sr. LeadJob Description: Must have good knowledge on the verification flows. Excellent hands-on debug skills and problem solving attitude.. Experience of working in complex test-bench/model in Verilog, System Verilog or SystemC Experience of working on Functional Verification, SoC Verification, Emulation Good in...
-
Design Verification Engineer
3 weeks ago
India ACL Digital Full time-We are seeking a highly skilled and experienced Senior Design Verification Engineer to join our SoC/ASIC verification team in Bangalore. The ideal candidate will have a deep understanding of the verification lifecycle, from test planning to coverage closure, and be able to independently drive complex verification tasks for IP, subsystem, or full-chip level...
-
Senior Design Verification Engineer
2 weeks ago
india Nurotech circuits private limited Full timeTips: UVM, Design Verification.ResponsibilitiesSenior DV engineer to develop UVM/SV-based testbench Good knowledge of SV/UVM is a must. Should have developed UVM/SV components like driver/monitor/scoreboard, Individual contributor role Exposure to protocols like AMBA, Serial protocols, PCIe, EthernetQualifications 6 to 8 years of DV experience...
-
Verification Engineer
5 days ago
India Alpinum Consulting Full timeONLY WEBSITE APPLICATIONS WILL BE ACCEPTED 🚀 We’re Hiring Verification Engineers (All Levels) | India, Remote Alpinum is expanding its global engineering team and looking for talented Verification Engineers at junior, mid, and senior levels to join us in shaping the future of semiconductor design and verification. Whether you’re just starting your...
-
Senior Design Verification Engineer
3 weeks ago
India Nurotech circuits private limited Full timeTips: UVM, Design Verification.ResponsibilitiesSenior DV engineer to develop UVM/SV-based testbenchGood knowledge of SV/UVM is a must.Should have developed UVM/SV components like driver/monitor/scoreboard,Individual contributor roleExposure to protocols like AMBA, Serial protocols, PCIe, EthernetQualifications6 to 8 years of DV experience minimum.Mtech/Btech...
-
Senior Design Verification Engineer
2 weeks ago
india L&T Technology Services Full timeJob Description DV Positions: Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-stem/SoC level verification Develop functional tests based on verification test plan Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage Debug, root-cause and resolve...
