STA Engineers
5 days ago
Static Timing Analysis (STA) Engineer Job SummaryThe Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with design and physical design teams to achieve the target operating frequency and performance metrics. Key Responsibilities Timing Sign-off and Analysis Timing Closure Ownership: Drive all aspects of timing closure from pre-layout to post-layout for blocks, sub-systems, and/or the full chip. Constraint Management: Develop, validate, and maintain Synopsys Design Constraints (SDC) and timing constraints for all functional and test modes (e.g., Scan, MBIST). MMMC Analysis: Perform comprehensive timing analysis across multiple operating corners (Process, Voltage, Temperature - PVT) and various modes (Multi-Mode Multi-Corner). Critical Path Identification: Analyze timing reports to identify and debug critical paths and resolve all Setup and Hold violations. Signal Integrity (SI) & Noise: Incorporate advanced timing effects such as on-chip variation (OCV), signal integrity (crosstalk), and voltage drop (IR-drop aware STA) into the sign-off process. Methodology and Flow Develop, maintain, and enhance STA flows and methodologies to improve efficiency, robustness, and reduce analysis runtime. Automate repetitive tasks and report generation using scripting languages. Generate final timing reports and sign-off collateral for tape-out.Education Bachelor's or Master's degree in Electrical Engineering (EE), Electronics Engineering, VLSI, or a related field.Technical Skills & ExperienceExperience:3+ years of experience in STA. EDA Tools:Expert proficiency with industry-standardElectronic Design Automation (EDA)tools from vendors like Synopsys (e.g., Fusion Compiler, ICC2, Primetime), Cadence (e.g., Innovus), or Mentor Graphics.Soft SkillsExcellent analytical, debugging, and problem-solving skills. Strong verbal and written communication skills. Ability to work effectively in a team environment and collaborate across different engineering disciplines.Experience Level :- 3yrs to 15yrs Notice Period :- Immediate to 60 Days Work Location :- Bangalore Mode of Work :- WFO Employment Type :- Permanent
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STA Engineer
1 day ago
New Delhi, India Mirafra Technologies Full timeSTA Engineer | Noida, Bangalore (3-10 Yrs) & PTPX Engineer (10 Years) | Bangalore We are looking for skilledSTA / PTPX Engineerswith strong experience in timing sign-off and power analysis. ️ Key Skills: • STA sign-off, MCMM timing closure • PrimeTime / PrimeTime-SI / PrimeTime-PX • PTPX power analysis (dynamic & static) • Timing constraints, ECOs,...
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STA CAD Engineer
3 days ago
New Delhi, India ACL Digital Full timeGreetings from ACL Digital We are looking for STA CAD Engineers.Experience Level:4+ years of STA CAD Job Description: STA CAD Engineer Location: Hyderabad and BangaloreJob Description: Bachelor's degree in Electrical or Computer Engineering and 4+ years STA (Timing, Constrains)/CAD experience or Master's degree and 2+ years' experience • Excellent...
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STA Engineer
2 weeks ago
New Delhi, India ACL Digital Full timeRole:STA Engineer Experience:3+ Years Location:Bangalore (Onsite) Notice Period:Immediate to 30 Days / Serving NoticeKey Responsibilities: PerformStatic Timing Analysis (STA)at block and full-chip levels across multiple design stages (synthesis, P&R, sign-off). Develop, validate, and maintaintiming constraints (SDC files)for complex SoC and IP-level designs....
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STA CAD Engineer
5 days ago
New Delhi, India ACL Digital Full timeGreetings from ACL DigitalWe are looking for STA CAD Engineers.Experience Level:4+ years of STA CADJob Description: STA CAD EngineerLocation: Hyderabad and BangaloreJob Description:- Bachelor's degree in Electrical or Computer Engineering and 4+ years STA (Timing, Constrains)/CAD experience or Master's degree and 2+ years' experience - • Excellent...
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STA Engineer
3 weeks ago
New Delhi, India ACL Digital Full timeRole: STA EngineerExperience: 3+ YearsLocation: Bangalore (Onsite)Notice Period: Immediate to 30 Days / Serving NoticeKey Responsibilities:- Perform Static Timing Analysis (STA) at block and full-chip levels across multiple design stages (synthesis, P&R, sign-off). - Develop, validate, and maintain timing constraints (SDC files) for complex SoC and IP-level...
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STA Synthesis Engineer
2 weeks ago
New Delhi, India L&T Technology Services Full timeL&T Technology is looking to hire for STA Engineers.Job Location : BangaloreDetailed JD is below ::JD For STA Engineer-6+ ’ experience• Good knowledge of timing closure knowledge for high frequency timing, congestion, and area sensitive designs.• Can work closely with FE team for constraints development and constraints cleanup.• Work with...
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Senior/Lead STA engineer
5 days ago
New Delhi, India ACL Digital Full timeWe’re Hiring: STA Engineer | 5–15 Years Experience | BangaloreCompany:ACL Digital Company Location:Bangalore Experience:5 to 15 Years Job Type:Full-TimeACL Digitalis looking forSenior Static Timing Analysis (STA) Engineerswith solid experience in timing closure of advanced SoC designs. If you’re an STA expert who thrives in fast-paced, technically...
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Senior/Lead STA engineer
3 days ago
New Delhi, India ACL Digital Full timeWe’re Hiring: STA Engineer | 5–15 Years Experience | Bangalore Company:ACL Digital Company Location:Bangalore Experience:5 to 15 Years Job Type:Full-TimeACL Digitalis looking forSenior Static Timing Analysis (STA) Engineerswith solid experience in timing closure of advanced SoC designs. If you’re an STA expert who thrives in fast-paced, technically...
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Static Timing Analysis
5 days ago
New Delhi, India LeadSoc Technologies Pvt Ltd Full timeStatic Timing Analysis (STA) Engineer Job Summary The Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with design and...
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Full Chip STA Lead
7 days ago
New Delhi, India eInfochips (An Arrow Company) Full timeFull Chip STA Lead (8+ Years Experience)Locations:Bangalore, Hyderabad, Noida, Ahmedabad, Chennai, PuneJob Description: We are looking for an experiencedFull Chip STA Leadwith strong expertise in full-chip timing, constraint management, and cross-functional collaboration. The ideal candidate will drive timing closure activities for complex SoCs and provide...
