Senior DFT Engineer
3 days ago
Job Title: Senior DFT Engineer (Architecture & Implementation)Location: BengaluruExperience: 5+ YearsAbout the Mission At Best NanoTech, we are building the silicon engines of the future. Whether it's AI accelerators or autonomous driving processors, our chips are massive and complex. Our DFT team is responsible for ensuring that every transistor we print works exactly as intended. We are looking for a Senior Engineer to lead DFT implementation and drive yield improvement.The Role As a Senior DFT Engineer, you will own the testability logic from architecture to post-silicon. You will work closely with RTL designers to make the design testable without compromising performance.Key Responsibilities:- Architecture: Define DFT architecture specifications including Scan, MBIST (Memory BIST), Boundary Scan, and IP test logic. - Insertion & Verification: Perform Scan insertion, DRC analysis, and simulation verification at block and top levels. - Pattern Generation: Generate high-coverage ATPG patterns (Stuck-at, Transition, Path Delay) and minimize test time using compression techniques. - Standards: Implement standard test interfaces like JTAG (IEEE 1149.1), iJTAG (IEEE 1687), and Core Wrapper (IEEE 1500). - Low Power: Handle DFT in complex low-power designs (UPF/CPF), ensuring isolation and level shifters are correctly handled during test modes. - Post-Silicon: Collaborate with the Product Engineering team on ATE pattern bring-up, diagnosis of fail logs, and yield enhancement.What You Bring (Requirements)- Experience: 5-10 years of hands-on experience in DFT for complex SoCs. - Tool Proficiency: Expert-level knowledge of industry-standard tools: Siemens (Mentor) Tessent, Synopsys TestMAX/SMS, or Cadence Modus. - Protocols: Deep understanding of JTAG, IJTAG, and high-speed I/O testing. - Scripting: Strong proficiency in Tcl, Perl, or Python to automate flows and parse reports. - Simulation: Experience with logic simulators (VCS/Questasim) for debugging pattern mismatches.Nice to Have- Experience with Analog/Mixed-Signal (AMS) testing. - Knowledge of Functional Safety (ISO 26262) for automotive chips. - Experience with 2.5D/3D-IC testing standards.How to Apply Click Apply Now to send your profile directly to talent@bestnanotech.in
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Senior DFT Engineer
4 weeks ago
New Delhi, India L&T Technology Services Full timeL&T Technology is hiring for Senior DFT Engineers / Lead DFT Engineer with 8-15 Years of experience.Job Location : BangaloreSkills Expertise should be : ATPG, SOC, ASIC DFT.
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Senior DFT Engineer
24 hours ago
New Delhi, India L&T Technology Services Full timeL&T Technology is hiring for Senior DFT Engineers / Lead DFT Engineer with 8-15 Years of experience.Job Location : BangaloreSkills Expertise should be : ATPG, SOC, ASIC DFT.
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Senior Dft Engineer
2 weeks ago
New Delhi, India L&T Technology Services Full timeL&T Technology is hiring for Senior DFT Engineers / Lead DFT Engineer with 8-15 Years of experience.Job Location : Bangalore Skills Expertise should be : ATPG, SOC, ASIC DFT.
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Senior Dft Engineer
6 days ago
New Delhi, India L&T Technology Services Full timeL&T Technology is hiring for Senior DFT Engineers / Lead DFT Engineer with 8-15 Years of experience.Job Location : Bangalore Skills Expertise should be : ATPG, SOC, ASIC DFT.
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Senior DFT Engineer
24 hours ago
New Delhi, India Best NanoTech Full timeJob Title: Senior DFT Engineer (Architecture & Implementation)Location: BengaluruExperience: 5+ YearsAbout the Mission At Best NanoTech, we are building the silicon engines of the future. Whether it's AI accelerators or autonomous driving processors, our chips are massive and complex. Our DFT team is responsible for ensuring that every transistor we print...
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Senior DFT Engineer
4 days ago
New Delhi, India Best NanoTech Full timeJob Title:Senior DFT Engineer (Architecture & Implementation) Location:Bengaluru Experience:5+ Years About the MissionAt Best NanoTech, we are building the silicon engines of the future. Whether it's AI accelerators or autonomous driving processors, our chips are massive and complex. Our DFT team is responsible for ensuring that every transistor we print...
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Senior DFT Engineer
1 week ago
New Delhi, India ACL Digital Full timeJob Title: DFT Engineer / Senior DFT Engineer / Lead / Manager / Staff Engineer Experience Range:3 – 17 Years Location:Bangalore / Noida / Chennai Notice Period:Immediate to 90 DaysOpen Positions: Lead / Manager – 4 Positions Junior & Mid-Level – 20+ Positions (For multipleCustomer-Based, In-House & Turnkey Projects ) Send Profiles...
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Senior DFT Engineer
24 hours ago
New Delhi, India ACL Digital Full timeJob Title: DFT Engineer / Senior DFT Engineer / Lead / Manager / Staff Engineer Experience Range:3 – 17 Years Location:Bangalore / Noida / Chennai Notice Period:Immediate to 90 DaysOpen Positions: Lead / Manager – 4 Positions Junior & Mid-Level – 20+ Positions (For multipleCustomer-Based, In-House & Turnkey Projects ) Send Profiles to: Key...
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DFT Engineer
4 weeks ago
New Delhi, India Best NanoTech Full timeJob Title: DFT Engineer (Senior / Lead)Location: Bengaluru, KAExperience: 10–15 YearsWe are looking for a highly experienced DFT Engineer with strong expertise in Mentor Graphics Tessent tools. The candidate should have deep hands-on experience across the full DFT flow—implementation, validation, debug—and be able to work independently on complex SoC...
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Senior Dft Engineer
6 days ago
New Delhi, India ACL Digital Full timeJob Title: DFT Engineer / Senior DFT Engineer / Lead / Manager / Staff EngineerExperience Range:3 – 17 Years Location:Bangalore / Noida / Chennai Notice Period:Immediate to 90 DaysOpen Positions: Lead / Manager – 4 Positions Junior & Mid-Level – 20+ Positions (For multipleCustomer-Based, In-House & Turnkey Projects) Send Profiles to: Key...
