SmartSoc Solutions

3 months ago

Bengaluru, India SmartSoc Solutions Pvt Ltd Full time

Title : IP / SOC Verification Engineer.

Years of Exp Required : 8-15 Years.

Location : Hyderabad / Bangalore.

Education : BE/BTech/M.E/M.Tech.

Job Description :


- Good communication skills.

- 8+ experience- in functional DV.

- Strong- understanding- of low power- UPF based verification.

- Good debugging skill.

- Knowledge of Power gating / Power management.

- Knowledge on AXI, SMN protocol.

- Previous AMD experience- is an added advantage.

- Trace, Cross-Trigger, JTAG, AXI.

- Security, real boot, Debug mode, Warm reset, power management and LP-UPF.

- Prior AMD experience is an added advantage.

IP/SOC Verification :

- Good communication skills.

- 7+ years of experience.

- Strong knowledge of UVM and system Verilog.

- IP/SOC verification.

- AMD Experience is preferred.

- Knowledge of AXI/AHB/APB.E/M.

- Scripting languages like perl, python etc.

- Good C/C++ coding skills.

- PCIe experience is an added advantage.

- Lead and drive block, subsystems, and full-chip verification of advanced ARM-based SOCs.


- Architect and build test benches, reference models, and scoreboards using SystemVerilog and UVM-constrained random methodologies


- Define and execute test plan for block, subsystem, and full-chip using SV/UVM and C/C++ FW running on the on-chip ARM processors


- Work in a dynamic and fast-paced startup environment and work closely with a team of passionate engineers to define and enhance the processes, methodology, and tools to verify complex SoCs.


- Work with Architects, design and verification, and system software teams to define system-level verification plans and prove that SOC meets the functional, performance, and power target defined in the architecture and design specs.


- Identify and write functional coverage groups to improve test/stimulus quality Through coverage, analysis to identify verification gaps and achieve 100% coverage closure


- Work with the different stakeholders and cross-functional leads to ensure high-quality SoC delivery on time


What you'll have :


- 8+ years of experience in design, verification, and validation of advanced ARM based SOCs


- 5+ years in architecting and building constrained random verification environments, reference models, scoreboards, and directed self-checking tests using System Verilog and UVM methodologies


- Deep understanding of ARM-based SOC verification.


- Writing assembly and C/C++ diagnostic firmware for embedded ARM processors and debugging in a simulation environment


- Working experience and knowledge in AMBA protocols, CoreSight Debugger, LPDDR, Ethernet, MIPI, and high-speed serdes, etc.


- Solid programming skills in System Verilog, UVM, C/C++, assembly, Perl/Python.


- Proficient in debugging complex SOC or CPU core designs


- Excellent verbal and written communication skills


- Ability to collaborate deeply with cross-functional leads and management teams


- Ability to deliver results in a very fast-moving environment


- Desire to learn implement groundbreaking new processes and methodology for continuous verification improvement


Nice to haves :


- Diagnostics Firmware development and validation


- Experience in pre-silicon validation on emulation platforms such as Cadence Palladium, Mentor Veloce, Synopsys Zebu Post-silicon bring-up and validation planning and execution

(ref:hirist.tech)

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