Design Verification Engineer
7 days ago
Job Summary:
Candidates are expected participate in providing inputs during design implementation discussions, responsible for creating the initial product verification methodology, selecting the testing environments, and developing testing plans to test functionality, performance..etc. You plan and develop a verification environment while coordinating with developers and architects throughout the design process.
Job Description:
- If you are an experienced engineer, a major part of your responsibility will be to take an independent verification role or drive a team in developing TB architecture definition and TB infrastructure/test coding development for Data Center Storage IP/Systems:
- Understanding product/IP/Module specifications and deriving the TB architectures.
- Developing verification plan, test plan, coverage plan, assertions..etc
- Developing block level and multi block level verification environments & reusable verification components based on SV/UVM methodology.
- Coverage metrics to ensure conformity, running regressions, debug test failures and regression management.
- Knowledge and working experience with any of the complex protocols like PCIe/Ethernet/NVMe/RDMA/Cryptography/Others – an advantage
- Expertise in Scripting languages like Perl/Python
- Knowledge in AMBA AXI, APB..etc is a must
- Ability to work collaboratively with other engineers and have good ownership and leadership skills.
- Strong oral and written communication skills, problem solving and analytical skills
Education and Experience:
- Masters/ Bachelors in EE/EC/CS with 3-10 years of experience in IP/SoC/ASIC Verification.
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