Lead Design Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ MTS SILICON DESIGN ENGINEER THE ROLE: As a member of the Silicon Design team at AMD you will help create leading edge IP’s used in a wide variety of applications. The focus of this role is to lead, design, plan and execute RTL design for NoC (Network on Chip). THE PERSON: Successful candidate will have an SOC/ASIC Design background, would have participated in several silicon design projects with increasing level of scope/responsibilities and has a history of achieving results through effective execution. KEY RESPONSIBILITIES: Write micro-architecture documentation and own major portions of the design and implementation of blocks to meet functional, timing, area, and power requirements. Collaborate with architecture and hardware teams to understand the requirements. Help lead and mentor other engineers to achieve project goals and organizational growth. Work with verification and physical design teams to achieve high quality design and successful tape outs. Design and implement logic functions that enable efficient test and debug. Contribute in cross-functional teams to solve novel problems across multiple functional areas in development of required features. Implement automation to increase design team efficiency. PREFERRED EXPERIENCE: Must have proven track record of ASIC design on several production tape-outs. Experience in Designing RTL block for an SOC. Experience in integrating ASIC IP into an SOC. Experience with Arm architecture and APB, AXI, CHI protocols. Experience with synthesis, static timing analysis & optimizations. Experience writing timing constraints and exceptions. Experience with automation using scripting techniques such as PERL, Python or Tcl Ability to develop clear and concise engineering documentation. Ability to organize and present complex technical information. Strong verbal and written communication skills. Exhibit strong ownership of tasks and responsibilities. ACADEMIC CREDENTIALS: Bachelor’s or master’s degree in computer engineering/Electrical Engineering #LI-PS1 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.MTS SILICON DESIGN ENGINEER THE ROLE: As a member of the Silicon Design team at AMD you will help create leading edge IP’s used in a wide variety of applications. The focus of this role is to lead, design, plan and execute RTL design for NoC (Network on Chip). THE PERSON: Successful candidate will have an SOC/ASIC Design background, would have participated in several silicon design projects with increasing level of scope/responsibilities and has a history of achieving results through effective execution. KEY RESPONSIBILITIES: Write micro-architecture documentation and own major portions of the design and implementation of blocks to meet functional, timing, area, and power requirements. Collaborate with architecture and hardware teams to understand the requirements. Help lead and mentor other engineers to achieve project goals and organizational growth. Work with verification and physical design teams to achieve high quality design and successful tape outs. Design and implement logic functions that enable efficient test and debug. Contribute in cross-functional teams to solve novel problems across multiple functional areas in development of required features. Implement automation to increase design team efficiency. PREFERRED EXPERIENCE: Must have proven track record of ASIC design on several production tape-outs. Experience in Designing RTL block for an SOC. Experience in integrating ASIC IP into an SOC. Experience with Arm architecture and APB, AXI, CHI protocols. Experience with synthesis, static timing analysis & optimizations. Experience writing timing constraints and exceptions. Experience with automation using scripting techniques such as PERL, Python or Tcl Ability to develop clear and concise engineering documentation. Ability to organize and present complex technical information. Strong verbal and written communication skills. Exhibit strong ownership of tasks and responsibilities. ACADEMIC CREDENTIALS: Bachelor’s or master’s degree in computer engineering/Electrical Engineering #LI-PS1
Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

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