IP Verification Engineer

3 weeks ago

New Delhi, India Tessolve Full time

Job Title:Senior IP Verification Engineer Experience:5+ Years Locations:Bengaluru / Hyderabad Company:Tessolve Semiconductor Job Type:Full-Time About Tessolve: Tessolve is a leading engineering solutions provider in the semiconductor space, offering end-to-end services inVLSI design, embedded systems, post-silicon validation, and test engineering . Our global presence and cutting-edge projects provide a strong platform for engineers to grow and innovate. Role Overview: We are hiringSenior IP Verification Engineerswith a passion for delivering high-quality, reusable verification components. This role involves working on industry-standard IPs and ensuring functional correctness through advanced verification methodologies. Key Responsibilities: Develop robust and reusableSystemVerilog UVM-based testbenches . Understand IP-level specifications and create comprehensiveverification plans . Write and rundirected and constrained-random test casesto achieve coverage targets. Build and monitorfunctional and code coveragemodels; drive coverage closure. Performdebugging and root cause analysisof simulation failures. Work with cross-functional teams (design, SoC, integration) for issue resolution. Runregression suites , triage failures, and maintain test status documentation. Participate inIP sign-off reviewsand documentation audits. Required Skills & Qualifications: Bachelor’s or Master’s inElectronics, Electrical, or Computer Engineering . Minimum5 years of hands-on experience in IP-level functional verification . Strong working knowledge ofSystemVerilog, UVM , and object-oriented programming. Experience withstandard IP protocolslike AXI, AHB, APB, DDR, PCIe, USB, etc. Proficient in simulation tools likeSynopsys VCS, Mentor Questa, or Cadence Xcelium . Skilled in scripting languages ( Python, Perl, Tcl ) for automation. Familiarity withassertion-based verification ,scoreboards , andcoverage-driven verification . Experience usingversion control tools(Git, Perforce) and regression management. Desirable (Good to Have): Knowledge offormal verificationtools/methodologies. Experience withpower-aware verification(UPF/CPF). Exposure tohardware emulation ,FPGA prototyping , orpost-silicon validation . Experience working in amulti-site collaboration environment . Familiarity withCI/CD toolslike Jenkins or GitLab CI. What You’ll Get: Opportunity to work oncomplex IPs and next-gen SoC programs . Exposure to a wide range of technologies acrossdesign, verification, and validation . Supportive and collaborative team culture withcareer growth opportunities . Access to global semiconductor leaders andcutting-edge projects . How to Apply: Interested candidates may send their updated resumes to: manjula.patil@tessolve.com Subject Line: Application for Senior IP Verification Engineer – Bengaluru/Hyderabad

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