CPU Micro Architect
3 months ago
CPU Micro Architect /Logic Designer
Bangalore
Ventana Micro Systems is at the forefront of the two hottest trends that are revolutionizing the semiconductor industry: RISC-V and Chiplet Architecture. Check out our CEO talking with global tech analyst Patrick Moorhead about how Ventana combines the extensibility of RISC-V with chiplet technology to create customer-driven innovation for best-in-class solutions for the data center.
Ventana is well-funded and backed by some of the largest strategic investors in the industry with the goal of building best-in-class CPU cores for cloud, enterprise, 5G, and Edge computing. We invite you to join the revolution and contribute to one of the Hottest Semiconductor startups in the industry.
CPU Micro Architect /Logic Designer
Responsibilities:
- Develop and refine microarchitecture, write design specifications, and deliver and maintain RTL for CPU Core and/or system-level sub-units
- Work with physical design engineers to physically realize Core/subsystem RTL using deep sub-micron process technologies
- Work with design verification/validation engineers to effectively test and debug Core/subsystem-level RTL in simulation, prototyping platforms, and silicon
- Help model, analyze, debug, and address performance issues and opportunities
Qualifications Required:
- 8+ years industry experience working on RTL for high performance CPU or GPU, memory subsystem, or related system-level designs
- Bachelors or Masters degree in related engineering field
- Ability to work independently and across geographies
- Strong domain knowledge of computer architecture
Skills Desired:
- Verilog/SystemVerilog development experience
- Industry experience with CPU microarchitecture (e.g. x86, ARM, SPARC, MIPS, RISC-V, POWER) and/or coherent caching systems
- Experience with high frequency design considerations (timing, power, multiple clock domains, etc.)
- Experience with typical front-end tools including: Verilog simulators, waveform viewers, and linting tools, as well as logic synthesis and place and route
- Experience in compiled and/or interpreted (Python, perl) languages
- Unit or feature ownership throughout the project lifecycle
- Post-silicon validation
- Bachelors or Masters degree in computer science or related engineering fields
Contact:
Uday
Mulya Technologies
muday_bhaskar@yahoo.com
"Mining The Knowledge Community"
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