DTC Infotech

Years Of Experience : 9+ Years with Lead Experience

Job Description :

We are looking for a Lead GLS (Gate-Level Simulation) Verification Engineer with extensive hands-on experience in GLS setup, debugging (timing and non-timing), and resolving X-propagation (XPROP) issues.

The ideal candidate should have a strong grasp of GLS methodologies and flows, automation using Python scripting, and a proven ability to lead small teams and drive execution across verification closure cycles.

Key Responsibilities :

- Lead and drive Gate-Level Simulation (GLS) activities across multiple IPs or SoC-level environments.

- Set up and execute GLS regressions in both timing-enabled and zero-delay (ZDB) modes.

- Identify, analyze, and resolve issues related to X-propagation (XPROP), unknown states, and timing violations.

- Define and enhance GLS methodology, checklists, and debug flows across teams/projects.

- Work closely with RTL, DFT, STA, and verification teams to drive GLS sign-off.

- Develop and maintain Python scripts for GLS automation, report generation, and log analysis.

- Mentor and guide a team of 35 verification engineers on GLS best practices and debug strategies.

- Own delivery timelines, technical reviews, and status reporting for GLS work packages.

Required Skills:

- Strong hands-on experience in GLS setup, simulations, and debug across IP/Sub-system/SoC level.

- Expertise in XPROP issue debugging, false X filtering, and initialization strategies.

- Solid understanding of timing-aware simulations, including SDF annotation and delay models.

- Deep familiarity with GLS methodologies, sign-off criteria, and waveform/log-based debug.

- Experience with industry-standard simulators like VCS, Questa, Xcelium.

- Proficiency in Python scripting for automation, filtering logs, and managing large regressions.

- Good communication skills with ability to drive cross-functional discussions