System-on-Chip Design Engineer
3 days ago
Title: SoC DesignPosition: Senior SoC/Staff SoC Design Engineer -CPUSSLocation: Bangalore, KA. IndiaCompany and Candidature Brief:Join the India team of most cutting-edge and well-funded storage startup in Silicon Valley as the Sr/Staff SOC Design Engineer responsible for designing complex SOC using ARM architecture. As a Sr/Staff SOC Design Engineer with a focus on ARM Ecosystem Components and Architecture, you will work to understand the internal requirements and complexities of our SOC system and architect the SoC. You will help design the SoC RTL, Integrate IPs and define top level logic. You will also work with verification team to make sure that high quality verification is achieved for first pass success of SoC. You will also participate in architecture/product definition through early involvement in the product life cycle.For a detailed information about us visit the company website:www.scaleflux.comRoles And Responsibilities- Contribute to SoC architecture for a multi-core ARM SOC - Define SoC micro architecture and design - Design and implementation of CPUSS subsystem - Working closely with the emulation and firmware teams to debug silicon functional issues. - Build SoC around key ARM subsystem components and other IPs including various interfaces - Design of clock-reset architecture and RTL implementation - Integration of all IPs into SoC - Work with verification team for complete SoC verification, review test plans - RTL Simulation and debug - Synthesis, Lint, CDC checks - Assist in emulation, FPGA, prototyping effortsQualification and Mandatory Skillset Requirements:- Minimum BE/BS degree (Masters preferred) in Electrical/Electronic Engineering/VLSI with 5 to 10 years of practical experience - Strong fundamentals in digital ASIC design - Expertise in ARM v8 and v9 specifications and their impact to SoC system architecture - Multiple project experience with ARM based ecosystem components (A-series ARM Cores, SMMU, GIC, Coresight, NIC and other complex bus interconnects) - Familiarity with AMBA bus protocols, system memory hierarchy, system debug infrastructure and multi-core SOC designs - Exposure to ARM platform architecture specifications - Strong experience with Verilog, SystemVerilog, DC/DC-T based synthesis, constraints development and RTL level checks. Low power methodology knowledge will be a plus. - Understanding of major SOC interfaces like PCIE, DRAM, Flash, I2C, SSP, UART. - Capable of working with multiple IP vendors and other teams - Excellent communication and leadership quality to lead design team
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Lead Configuration Management Engineer
5 days ago
New Delhi, India Cadence System Design and Analysis Full timeCadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.Cadence customers are the world’s most innovative companies, delivering extraordinary...
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Senior Physical Design Engineer
4 days ago
New Delhi, India Eximietas Design Full timeHi All, Eximietas Hiring Senior Physical Design Leads/Architects/Managers/Sr. Managers Experience: 10+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1B or Already in US. .About the job Qualification Required: Typically requires a minimum of10+ years of experience in Physical Designwith mainstream P&R...
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Electronic Design Automation Engineer
3 days ago
New Delhi, India Talent Sutra Full timeExpertise in one or more of the following domains:- Power Optimization: Experience with low-power design techniques and methodologies, including the use of the Unified Power Format (UPF). - Timing Optimization: Proficiency in static timing analysis (STA) and experience with design constraints using the Synopsys Design Constraints (SDC) format. - Functional...
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Electronic Design Automation Engineer
22 hours ago
New Delhi, India Talent Sutra Full timeExpertise in one or more of the following domains: Power Optimization:Experience with low-power design techniques and methodologies, including the use of the Unified Power Format (UPF). Timing Optimization:Proficiency in static timing analysis (STA) and experience with design constraints using the Synopsys Design Constraints (SDC) format. Functional Safety...
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RTL Release Principal Design Engineer
5 days ago
New Delhi, India Cadence System Design and Analysis Full timeCollege education in Electronics Engineering or Computer Engineering Exp- 7-12 Yrs - Working knowledge in RTL design flow steps like RTL coding, Simulation, compilation/testbench validation, Synthesis, Timing, DFT,lint, CDC, LEC etc. - Ability to debug existing Verilog/System verilog test cases with little or no help from the designer. - Functional...
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Verification Lead Design Engineer
3 days ago
New Delhi, India Cadence System Design and Analysis Full time- BE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer. - 5+ years of Design Verification experience with SV/UVM - Strong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must. - Design Verification experience verifying complex...
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Design Verification Engineer
3 days ago
New Delhi, India DBSI Services Full timeJob Title: Design Verification Engineer Location: Bangalore, India Type - Full timeDescription:Client is seeking a Design Verification Engineer. The role is technical, hands-on, in charge of the verification environment for new silicon projects and developments. We are looking for an experienced professional with Passion & Drive to succeed.Primary...
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Sr RTL Principal Design Engineer
23 hours ago
New Delhi, India Cadence System Design and Analysis Full time- RTL Design Engineer for Interface Controller IP development team. - Position is based in Bangalore or Noida. - The role would include design and support of the RTL of the PCIe/CXL/IDE/UALink IP solution of Cadence. - The work involved will be working with the existing RTL, addition of new features into the RTL, ensuring various customer configurations are...
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Sr RTL Principal Design Engineer
1 week ago
New Delhi, India Cadence System Design and Analysis Full timeRTL Design Engineer forInterface Controller IP developmentteam. Position is based inBangaloreor Noida. The role would include design and support of the RTL of the PCIe/CXL/IDE/UALink IP solution of Cadence. The work involved will be working with the existing RTL, addition of new features into the RTL, ensuring various customer configurations are clean as...
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Senior Physical Design Architects
3 days ago
New Delhi, India Eximietas Design Full timeHi All,Eximietas Hiring Senior Physical Design Architects.Experience: 10+ Years.Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA.Anyone with a Valid H1B or Already in US.About the jobQualification Required:- Typically requires a minimum of 10+ years of experience in Physical Design with mainstream P&R tools - Bachelors OR Masters...
