Senior Lead STA Engineer
16 hours ago
#DSP_Senior_Lead_STA_Engineer_Noida.
General Summary:
As a Senior Lead STA Engineer, you will play a critical role in the design, optimization, verification, and timing closure of advanced hardware platforms. You will collaborate closely with cross-functional teams across design, physical implementation, and verification to ensure best-in-class performance, power efficiency, and quality.
Minimum Qualifications
Education & Experience
Bachelor’s degree in Computer Science, Electrical/Electronics Engineering, or a related field 4+ years of hands-on experience in Static Timing Analysis (STA), timing constraints, and physical implementation
Key Technical Skills & Experience
Strong expertise in industry-standard STA tools such as PrimeTime (PT) and Tempus
Familiarity with physical design and P&R tools including Innovus and Fusion Compiler
Proven experience in timing closure and STA fixing, including critical path analysis and clock path debugging
Hands-on experience creating and implementing complex ECOs for timing convergence across extensive corner scenarios using:
Tweaker
Tempus
Physical PT ECOs
Manual ECO techniques
Experience with advanced deep sub-micron technology nodes (below 10nm) is strongly preferred
Knowledge of high-performance and low-power interface timing is a plus
Strong fundamentals in VLSI design, synchronous design principles, timing checks, and constraint development
Proficiency in UNIX/Linux environments
Strong scripting skills in TCL, PT-TCL, and Tempus-TCL
Python scripting experience is an added advantage
PLease do reach me on +91-9071106778
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