Sr Verification Principal Design Engineer

This is a full-time on-site role for a Sr Principal Physical Design Engineer based in Bengaluru. The engineer will be responsible for overseeing and contributing to the physical design process of complex IPs, especially Memory IPs with higher frequencies on latest Tech. nodes. Day-to-day tasks include floorplanning, placement, clock tree synthesis, routing,...

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.This is a full-time on-site role for a Sr Principal Physical Design Engineer based in Bengaluru. The engineer will be responsible for overseeing and contributing to the physical design process of complex IPs, especially Memory IPs with higher...

Eximietas Design Hiring Senior Design Verification Architects/ Sr. Manger.Experience: 10+ Years.Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA.Anyone with a Valid H1B or Already in US.Job Description:# Lead SoC Design Verification efforts for complex projects, ensuringsuccessful execution of verification plans.# Develop and...

Design Verification Engineer - Senior / Lead / Sr. LeadJob Description:Must have good knowledge on the verification flows.Excellent hands-on debug skills and problem solving attitude..Experience of working in complex test-bench/model in Verilog, System Verilog or SystemCExperience of working on Functional Verification, SoC Verification, EmulationGood in...

We are looking for Sr Design Verification Engineer / Lead / Manager with 4 to 25 yrs experience ..location - Bangalore

Position Description:Design Verification role for IP development team.B. Tech/M. Tech with 10+ years of relevant experience.Position is based in Bangalore/Noida, part of Cadence IP Group.Verification role for Serial and Interface Design IPs verification (PCIe, CCIX, CXL, USB, Ethernet, SATA/SAS, UFS, SPI, HDMI, MIPI, I3 C)UVM testbench development to build a...

Position Description:Design Verification role for IP development team.B. Tech/M.Tech with 10+ years of relevant experience.Position is based in Bangalore/Noida, part of Cadence IP Group.Verification role for Serial and Interface Design IPs verification (PCIe, CCIX, CXL, USB, Ethernet, SATA/SAS, UFS, SPI, HDMI, MIPI, I3C)UVM testbench development to build a...

Position Description: Design Verification role for IP development team. B. Tech/M.Tech with 10+ years of relevant experience. Position is based in Bangalore/Noida, part of Cadence IP Group. Verification role for Serial and Interface Design IPs verification (PCIe, CCIX, CXL, USB, Ethernet, SATA/SAS, UFS, SPI, HDMI, MIPI, I3C) UVM testbench development to...

BE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer.5+ years of Design Verification experience with SV/UVMStrong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must.Design Verification experience verifying complex designs and...

RTL Design Engineer for Interface Controller IP development team.Position is based in Bangalore or Noida.The role would include design and support of the RTL of the PCIe/CXL/IDE/UALink IP solution of Cadence.The work involved will be working with the existing RTL, addition of new features into the RTL, ensuring various customer configurations are clean as...